Ultra-High-Speed Transmitter and Receiver ICs for 100 Gbit/s Ethernet Using InP DHBTs

R. Makon, R. Driad, J. Rosenzweig, V. Hurm, C. Schubert, H. Walcher, M. Schlechtweg, O. Ambacher
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引用次数: 3

Abstract

Key components and architecture options are being actively investigated to realize next generation transport technology in optical networks. Serial transmission systems using a single wavelength have, so far, provided cost effective solutions and therefore remain desirable. For 100 Gbit/s Ethernet, this option will, however, depend on the availability of the electronic and optical components. Due to its high speed and high breakdown voltage, the InP double-heterojunction bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This contribution describes our InP DHBT based integrated circuit (IC) technology developed for 100 Gbit/s class mixed-signal ICs. Using this technology, we fabricated and succeeded in 112 Gbit/s testing of key electronic components, including a multiplexer (MUX), a distributed amplifier, and an integrated clock and data recovery (CDR)/1:2 demultiplexer (DEMUX), with very clear eye waveforms. These high-speed building block ICs are described and the main results are presented.
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使用InP dhbt的100 Gbit/s以太网超高速发送和接收ic
为了在光网络中实现下一代传输技术,正在积极研究关键组件和架构选择。到目前为止,使用单一波长的串行传输系统提供了具有成本效益的解决方案,因此仍然是可取的。然而,对于100gbit /s以太网,这一选项将取决于电子和光学组件的可用性。由于其高速度和高击穿电压,InP双异质结双极晶体管(DHBT)技术特别适合于信号处理和高速通信系统。该贡献描述了我们为100 Gbit/s级混合信号IC开发的基于InP DHBT的集成电路(IC)技术。利用该技术,我们制作并成功完成了112 Gbit/s的关键电子元件测试,包括多路复用器(MUX),分布式放大器和集成时钟和数据恢复(CDR)/1:2解复用器(DEMUX),具有非常清晰的眼波形。对这些高速集成电路进行了描述,并给出了主要结果。
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