The Synergetic Effects of Total Ionizing Dose and High Temperature on 180 nm DSOI Technology

Xu Zhang, Fanyu Liu, Bo Li, Siyuan Chen, Yang Huang, Jiangjiang Li, J. Jiao, T. Ye, Jiajun Luo
{"title":"The Synergetic Effects of Total Ionizing Dose and High Temperature on 180 nm DSOI Technology","authors":"Xu Zhang, Fanyu Liu, Bo Li, Siyuan Chen, Yang Huang, Jiangjiang Li, J. Jiao, T. Ye, Jiajun Luo","doi":"10.1109/APCCAS55924.2022.10090371","DOIUrl":null,"url":null,"abstract":"The synergetic effects of high temperature and total ionizing dose effects of H-gate DSOI are investigated under the TG-state bias condition. The comparative irradiation experiments are subjected to identify the synergetic effects by separating pure-temperature and pure-irradiation effects. Furthermore, the mitigated TID responses with/without back-gate compensation are discussed. The results show that synergetic effects make threshold voltage degradation weaken for our devices with the $\\boldsymbol{V}_{\\text{SO12}}=0\\ \\mathbf{V}$ during testing. It can be explained that the electrons will be more likely to tunnel into the oxides and compensate the trapped charges with temperature rising. Besides, with the $\\boldsymbol{V}_{\\text{SO}12}=-\\boldsymbol{10}\\ \\mathrm{V}$, the common TID mitigation was observed under room temperature and the synergetic effects can still be greatly compensated due to the electric field lines induced by positive trapped charges terminating into the negatively biased electrode. It may enlighten us the high TID tolerance of DSOI can be achieved in very harsh environments.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090371","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The synergetic effects of high temperature and total ionizing dose effects of H-gate DSOI are investigated under the TG-state bias condition. The comparative irradiation experiments are subjected to identify the synergetic effects by separating pure-temperature and pure-irradiation effects. Furthermore, the mitigated TID responses with/without back-gate compensation are discussed. The results show that synergetic effects make threshold voltage degradation weaken for our devices with the $\boldsymbol{V}_{\text{SO12}}=0\ \mathbf{V}$ during testing. It can be explained that the electrons will be more likely to tunnel into the oxides and compensate the trapped charges with temperature rising. Besides, with the $\boldsymbol{V}_{\text{SO}12}=-\boldsymbol{10}\ \mathrm{V}$, the common TID mitigation was observed under room temperature and the synergetic effects can still be greatly compensated due to the electric field lines induced by positive trapped charges terminating into the negatively biased electrode. It may enlighten us the high TID tolerance of DSOI can be achieved in very harsh environments.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
总电离剂量和高温对180nm DSOI工艺的协同效应
在tg态偏置条件下,研究了高温和总电离剂量效应对h栅DSOI的协同效应。通过对比辐照实验,将纯温度效应与纯辐照效应分离,确定了两者的协同效应。此外,还讨论了有无后门补偿的缓和TID响应。结果表明,在测试过程中,当$\boldsymbol{V}_{\text{SO12}}=0\ \mathbf{V}$时,协同效应使阈值电压退化减弱。这可以解释为,随着温度的升高,电子更有可能隧穿到氧化物中,并补偿被捕获的电荷。此外,使用$\boldsymbol{V}_{\text{SO}12}=-\boldsymbol{10}\ \mathrm{V}$,在室温下观察到共同的TID缓解,并且由于正电荷捕获引起的电场线终止于负偏压电极,仍然可以很大程度上补偿协同效应。这可能会启发我们在非常恶劣的环境中也可以实现DSOI的高TID耐受性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout An Eigen-decomposition Free Method for Computing Graph Fourier Transform Centrality A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE A Vector Pair Based DWA Algorithm for Linearity Enhancement of CDACs in the NS-SAR ADC Optimal Evasive Path Planning with Velocity Constraint
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1