Reliability Influences from Electrical Overstress on LSI Devices

Abstract

Reliability prediction of MOS LSI devices by testing at elevated temperature can be influenced by electrostatic discharge and electrical overstress conditions during the test period. MOS devices that used junction diodes in the input protection structure were found to be more susceptible to failure from electrostatic discharge in 125°C ambient temperature than at 25°C. Failure analysis and modeling indicate that this effect is more severe for MOS LSI devices than for bipolar devices due to the doping levels used in the MOS technology. These effects will impact accelerated life testing, simulation testing of electronic systems to be operated at elevated temperatures and failure analysis techniques performed at elevated temperatures.