Intrinsic fluctuations in Vertical NAND flash memories

E. Nowak, Jae-ho Kim, Hyeyoung Kwon, Young-Gu Kim, J. Sim, Seung-Hyun Lim, Dae Sin Kim, Keun-Ho Lee, Young-Kwan Park, Jeong-Hyuk Choi, C. Chung
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引用次数: 45

Abstract

Vertical NAND (VNAND) technology relies on polysilicon for channel material. Two intrinsic variation sources of the cell threshold voltage induced by polysilicon traps have been identified and simulated: Random Trap Fluctuation (RTF) and Random Telegraph Noise (RTN). We demonstrate that RTN is enhanced by the polysilicon material and an original model explains the asymmetric RTN distribution observed after endurance. This work enables the prediction of VT distribution for VNAND devices in MLC operation.
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垂直NAND快闪记忆体的内在波动
垂直NAND (VNAND)技术依靠多晶硅作为通道材料。确定并模拟了多晶硅陷阱引起电池阈值电压的两种本征变化源:随机陷阱波动(RTF)和随机电报噪声(RTN)。我们证明了RTN被多晶硅材料增强,并且一个原始模型解释了耐久后观察到的不对称RTN分布。这项工作使VNAND器件在MLC运行中的VT分布预测成为可能。
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