Design of high linear CMOS Mixer for 5G Applications

M. Mohammadi, M. Yargholi
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Abstract

In this article, we are going to design and propose a mixer for 5G applications. The proposed mixer has a noise figure (NF) between 10- 11dB and an achieved gain of 15–17 dB in the operating Frequency of 30 GHz. The proposed mixer is designed in TSMC 180nm which has a reversed isolation of -47 dB in this frequency, and it has an OP1dB of 30 dBm in the RF port of 20dBm. The IP3 of the proposed mixer is about 60dBm. The techniques used for designing the proposed mixer are the current mirror PMOS transistors to enhance the gain and the inductive degeneration in RF transistors to increase the linearity.
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5G高线性CMOS混频器设计
在本文中,我们将设计并提出用于5G应用的混频器。该混频器的噪声系数(NF)在10- 11dB之间,在30ghz工作频率下实现增益为15 - 17db。该混频器采用台积电180nm制程设计,在该频率具有-47 dB的反向隔离,在20dBm的射频端口具有30 dBm的OP1dB。该混频器的IP3约为60dBm。设计该混频器的技术是采用电流镜像PMOS晶体管来提高增益,采用射频晶体管的电感退化来提高线性度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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