Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730153
Mehrdad Karimi, M. Ehsanian
A high-performance CMOS hybrid Envelope Tracking circuit is designed to improve the average efficiency and linearity of an RF power amplifier driven by high PAPR signals. A class AB PA at 0.9 GHz and a dynamic power supply for variable envelope signals are designed and simulated with 180nm CMOS technology with 3.3V supply voltage. The dynamic power supply is a hybrid parallel structure that a switching class D amplifier supplies most of the required current and a linear operational Transconductance amplifier covers high bandwidth requirements and also eliminates output ripples of the switching amplifier. The Efficiency of the envelope modulator for 20 MHz LTE signal with 6 dB PAPR at 24 dBm output power is 68%. The average efficiency of proposed ET PA compared with fixed supply class AB PA for 20 MHz LTE signal at 6dB back-off power is increased from 19% to 37%. By prevention of falling the supply voltage below 1V, the EVM of ETPA is decreased from 12% to 7%.
{"title":"A High-Performance CMOS Hybrid Envelope Tracking Power Amplifier for Wideband High PAPR Applications","authors":"Mehrdad Karimi, M. Ehsanian","doi":"10.1109/IICM55040.2021.9730153","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730153","url":null,"abstract":"A high-performance CMOS hybrid Envelope Tracking circuit is designed to improve the average efficiency and linearity of an RF power amplifier driven by high PAPR signals. A class AB PA at 0.9 GHz and a dynamic power supply for variable envelope signals are designed and simulated with 180nm CMOS technology with 3.3V supply voltage. The dynamic power supply is a hybrid parallel structure that a switching class D amplifier supplies most of the required current and a linear operational Transconductance amplifier covers high bandwidth requirements and also eliminates output ripples of the switching amplifier. The Efficiency of the envelope modulator for 20 MHz LTE signal with 6 dB PAPR at 24 dBm output power is 68%. The average efficiency of proposed ET PA compared with fixed supply class AB PA for 20 MHz LTE signal at 6dB back-off power is increased from 19% to 37%. By prevention of falling the supply voltage below 1V, the EVM of ETPA is decreased from 12% to 7%.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122004812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730131
Omid Qorbani, E. N. Aghdam
Today's ultrasonic flow metering is very important in the industry. By using ultrasound tomography, we can be obtained cross-sectional images from inside a tube that contains two-phase fluid. By processing these images, the flow of each phase can be calculated separately. Time of flight ultrasonic tomography was used in the proposed method and does not be used conventional methods for image reconstruction. The flow rate of each phase is obtained directly from the sensitivity matrix. The proposed method is independent of flow pattern identification and then there is no need to calibration and as a result, the system is stable. One MHz piezoelectric was used to implement the proposed method and 16 piezoelectric was mounted to implement for a fan-shaped ring, also a four-channel AFE board with a sampling speed of 105 MHz and a 14-bit resolution was used. All control signals are generated by FPGA and there is no need for a microprocessor to control the process. A very simple power amplifier is used to drive the piezoelectric which has low power consumption and contributes to the stability of the system. The simulation results of the measured values show a low error of the SIE factor.
{"title":"An Ultrasonic Tomography Flowmeter Implementation for Gas/Liquid Two-Phase Flow Measurement","authors":"Omid Qorbani, E. N. Aghdam","doi":"10.1109/IICM55040.2021.9730131","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730131","url":null,"abstract":"Today's ultrasonic flow metering is very important in the industry. By using ultrasound tomography, we can be obtained cross-sectional images from inside a tube that contains two-phase fluid. By processing these images, the flow of each phase can be calculated separately. Time of flight ultrasonic tomography was used in the proposed method and does not be used conventional methods for image reconstruction. The flow rate of each phase is obtained directly from the sensitivity matrix. The proposed method is independent of flow pattern identification and then there is no need to calibration and as a result, the system is stable. One MHz piezoelectric was used to implement the proposed method and 16 piezoelectric was mounted to implement for a fan-shaped ring, also a four-channel AFE board with a sampling speed of 105 MHz and a 14-bit resolution was used. All control signals are generated by FPGA and there is no need for a microprocessor to control the process. A very simple power amplifier is used to drive the piezoelectric which has low power consumption and contributes to the stability of the system. The simulation results of the measured values show a low error of the SIE factor.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133524811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730359
M. Alidaei, Vahid Ahmadi, Farzaneh Arabpour
The perovskite structure is decomposed to its precursor in the face of continuous light irradiation (mainly UV light), humidity, and heat. In this work, mesoporous PSCs are fabricated in uncontrolled environment. The UV light stability of the PSC is enhanced by adding a photoactive phase change material (PCM) into the perovskite. The PCM undergoes trans to cis isomerization under UV light irradiation. Then, the cis form absorbs the heat produced in the solar cell and converts it into its trans isomer in a reversible process. By this approach, the destructive effect of UV light and heat is prohibited, leading to the enhancement of PSC durability by more than 138 % compared to devices without PCM. It should be noted that there is no significant difference in the PCE of both solar cells.
{"title":"Lifetime Improvement Of Perovskite Solar Cell Using A Photoactive Phase Change Material","authors":"M. Alidaei, Vahid Ahmadi, Farzaneh Arabpour","doi":"10.1109/IICM55040.2021.9730359","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730359","url":null,"abstract":"The perovskite structure is decomposed to its precursor in the face of continuous light irradiation (mainly UV light), humidity, and heat. In this work, mesoporous PSCs are fabricated in uncontrolled environment. The UV light stability of the PSC is enhanced by adding a photoactive phase change material (PCM) into the perovskite. The PCM undergoes trans to cis isomerization under UV light irradiation. Then, the cis form absorbs the heat produced in the solar cell and converts it into its trans isomer in a reversible process. By this approach, the destructive effect of UV light and heat is prohibited, leading to the enhancement of PSC durability by more than 138 % compared to devices without PCM. It should be noted that there is no significant difference in the PCE of both solar cells.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128988661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730452
Maryam Ahangar Darband, E. Najafiaghdam
A numerical study and simulation of cancerous tumor detection using the photoacoustic (PA) phenomenon and thermoacoustic (TA) with electric excitation is presented. This report was in small dimension of mimic breast tissue. Besides, the different layers of the breast were considered. Therefore, it was possible to rely on the values and characteristics of the resulting data in comparing two methods. A single suitable platform for simulating, which is commercially available Finite Element software (COMSOL®), has been selected. By using this platform, we were able to simulate these two methods from stimulation to propagation continuously. All required characteristics of breast and tumor were accurately calculated or obtained from a reliable source. We can study the resulting PA and TA wave and its changes in more detail by our defined scenarios.
{"title":"Diagnosing Cancerous Tumor by Two Techniques: Photoacoustic Imaging and Thermoacoustic Tomography With Electric Excitation—A Numerical Approach For Comparison","authors":"Maryam Ahangar Darband, E. Najafiaghdam","doi":"10.1109/IICM55040.2021.9730452","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730452","url":null,"abstract":"A numerical study and simulation of cancerous tumor detection using the photoacoustic (PA) phenomenon and thermoacoustic (TA) with electric excitation is presented. This report was in small dimension of mimic breast tissue. Besides, the different layers of the breast were considered. Therefore, it was possible to rely on the values and characteristics of the resulting data in comparing two methods. A single suitable platform for simulating, which is commercially available Finite Element software (COMSOL®), has been selected. By using this platform, we were able to simulate these two methods from stimulation to propagation continuously. All required characteristics of breast and tumor were accurately calculated or obtained from a reliable source. We can study the resulting PA and TA wave and its changes in more detail by our defined scenarios.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122381892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730168
Mehrdad Heidari Vincheh, S. Saeedi
A single-ended negative capacitor (SNC) circuit in CMOS technology is presented in this paper. Using this circuit, the effect of parasitic capacitances and quenching time (TQ) of single photon avalanche diodes (SPADs) can be reduced. To demonstrate efficiency of the proposed technique, two different quenching circuits are designed and simulated. In these simulations, a behavioral model in VerilogA is introduced. Simulation results show that the quenching time is reduced by 38% and 74% in the circuits by employing the proposed SNC topology.
{"title":"A High-Speed Optical Receiver Front-end for Single Photon Avalanche Diodes (SPADs)","authors":"Mehrdad Heidari Vincheh, S. Saeedi","doi":"10.1109/IICM55040.2021.9730168","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730168","url":null,"abstract":"A single-ended negative capacitor (SNC) circuit in CMOS technology is presented in this paper. Using this circuit, the effect of parasitic capacitances and quenching time (TQ) of single photon avalanche diodes (SPADs) can be reduced. To demonstrate efficiency of the proposed technique, two different quenching circuits are designed and simulated. In these simulations, a behavioral model in VerilogA is introduced. Simulation results show that the quenching time is reduced by 38% and 74% in the circuits by employing the proposed SNC topology.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127718954","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730225
M. M. Teymoori, S. M. Mirebrahimi, M. Dousti
A novel 3-state unit cell for distributed MEMS transmission line (DMTL) phase shifters is designed and simulated in this paper. The proposed structure consists of a coplanar waveguide transmission line, a MEMS and two-pair metal-air-metal bridges. The bridges are actuated respectively in three different modes which produce three different phase shifts. The structure is simulated using HFSS software. Based on the simulation results, the return loss in all 3 states is better than -10dB and the phase shift is in good agreement with ideal values. The designed unit cell is very suitable for 5-bit and 6-bit DMTL phase shifters.
{"title":"Design of a 3-state Unit Cell for DMTL Phase Shifters","authors":"M. M. Teymoori, S. M. Mirebrahimi, M. Dousti","doi":"10.1109/IICM55040.2021.9730225","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730225","url":null,"abstract":"A novel 3-state unit cell for distributed MEMS transmission line (DMTL) phase shifters is designed and simulated in this paper. The proposed structure consists of a coplanar waveguide transmission line, a MEMS and two-pair metal-air-metal bridges. The bridges are actuated respectively in three different modes which produce three different phase shifts. The structure is simulated using HFSS software. Based on the simulation results, the return loss in all 3 states is better than -10dB and the phase shift is in good agreement with ideal values. The designed unit cell is very suitable for 5-bit and 6-bit DMTL phase shifters.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115377939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730438
Vahid Seif, A. Jannesari
A six-stage 4-branch startup charge pump for energy harvesting application is presented. Using dynamic body biasing techniques on NMOS Charge transfer switches (CTS's) and applying boosted gate control scheme on PMOS CTS's, raise the charge transferability of structure in the subthreshold region. Furthermore, an ultra-low power quadrature phase generator provides clock signals of 4 pumping branches in the frequency of 5.09MHz. The proposed 6 stage charge pump circuit is designed in a standard 0.18 μm CMOS process with120 pF and 20 pF, total pumping capacitance and load capacitance, respectively. The output voltage of the proposed structure can rise from 300mv to 1.99v within 135ns. With a conversion efficiency of 94.7%, the minimum startup voltage of the proposed charge pump is 280mv.
{"title":"A 280mv Input Fast Transient Startup Charge Pump with a 4 Phase Ring Oscillator for Energy Harvesting Applications","authors":"Vahid Seif, A. Jannesari","doi":"10.1109/IICM55040.2021.9730438","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730438","url":null,"abstract":"A six-stage 4-branch startup charge pump for energy harvesting application is presented. Using dynamic body biasing techniques on NMOS Charge transfer switches (CTS's) and applying boosted gate control scheme on PMOS CTS's, raise the charge transferability of structure in the subthreshold region. Furthermore, an ultra-low power quadrature phase generator provides clock signals of 4 pumping branches in the frequency of 5.09MHz. The proposed 6 stage charge pump circuit is designed in a standard 0.18 μm CMOS process with120 pF and 20 pF, total pumping capacitance and load capacitance, respectively. The output voltage of the proposed structure can rise from 300mv to 1.99v within 135ns. With a conversion efficiency of 94.7%, the minimum startup voltage of the proposed charge pump is 280mv.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128874024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730346
A. Zanjani, M. Jalali
In this paper, a new power-efficient Variable Resolution Level-Crossing Analog-to-Digital Converter (LC-ADC) is proposed equipped with a regulating feedback network. The feedback network assesses the input signal activity and regulates the sampling rate continuously to prevent excessive sampling, especially for the fast-moving portions of the input signal. While the evaluation process is performed by a charge pump, another multi-level comparator and switching network are responsible for applying the results. Therefore, the quantization window is dynamically configured according to the signal activity. As a result, designing the other building blocks of the proposed LC-ADC is relaxed regarding the speed and power requirements leading to higher power efficiency. Implemented in a 0.18 μm standard CMOS process, the proposed LC-ADC occupies ~0.0041 mm2 of silicon area and consumes ~18 nW from 1 V supply voltage. Assuming a 1 kHz full-scale input sinusoidal signal, it achieves an average signal-to-noise and distortion ratio (SNDR) of ~43 dB and an effective number of bits (ENOB) of ~6.8 bits.
{"title":"A Low-Power Variable-Resolution Asynchronous Analog-to-Digital Converter","authors":"A. Zanjani, M. Jalali","doi":"10.1109/IICM55040.2021.9730346","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730346","url":null,"abstract":"In this paper, a new power-efficient Variable Resolution Level-Crossing Analog-to-Digital Converter (LC-ADC) is proposed equipped with a regulating feedback network. The feedback network assesses the input signal activity and regulates the sampling rate continuously to prevent excessive sampling, especially for the fast-moving portions of the input signal. While the evaluation process is performed by a charge pump, another multi-level comparator and switching network are responsible for applying the results. Therefore, the quantization window is dynamically configured according to the signal activity. As a result, designing the other building blocks of the proposed LC-ADC is relaxed regarding the speed and power requirements leading to higher power efficiency. Implemented in a 0.18 μm standard CMOS process, the proposed LC-ADC occupies ~0.0041 mm2 of silicon area and consumes ~18 nW from 1 V supply voltage. Assuming a 1 kHz full-scale input sinusoidal signal, it achieves an average signal-to-noise and distortion ratio (SNDR) of ~43 dB and an effective number of bits (ENOB) of ~6.8 bits.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130780309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730140
Hesam Abbasi, M. Yavari
This paper presents a CMOS active inductorless downconversion mixer for zero-IF receivers. The structure implements the 1M2 injection and derivative superposition techniques to improve the linearity. Nonlinear currents are generated by auxiliary transistors and they are injected to the nonlinear currents of the input transistors into increase the second-order input intercept point (IIP2) and third-order input intercept point (IIP3) values of the mixer. Common-Gate structure is used in the RF input stage. To reduce the noise contribution of the input transistors, a noise cancellation technique is employed. The proposed mixer is designed in 65 nm CMOS technology and simulated using Spectre-RF in Cadence. The simulation results show 8.34 dB, 6.81 dB, and 4.15 dB on average improvement for IIP2, IIP3, and NF, respectively, in the 0.8-5 GHz input frequency range. The proposed mixer consumes 13.95 mW power which is 64.1% more than the conventional CMOS active mixer.
{"title":"A Wideband Low-Noise Inductor less CMOS Active Mixer With Improved Linearity","authors":"Hesam Abbasi, M. Yavari","doi":"10.1109/IICM55040.2021.9730140","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730140","url":null,"abstract":"This paper presents a CMOS active inductorless downconversion mixer for zero-IF receivers. The structure implements the 1M2 injection and derivative superposition techniques to improve the linearity. Nonlinear currents are generated by auxiliary transistors and they are injected to the nonlinear currents of the input transistors into increase the second-order input intercept point (IIP2) and third-order input intercept point (IIP3) values of the mixer. Common-Gate structure is used in the RF input stage. To reduce the noise contribution of the input transistors, a noise cancellation technique is employed. The proposed mixer is designed in 65 nm CMOS technology and simulated using Spectre-RF in Cadence. The simulation results show 8.34 dB, 6.81 dB, and 4.15 dB on average improvement for IIP2, IIP3, and NF, respectively, in the 0.8-5 GHz input frequency range. The proposed mixer consumes 13.95 mW power which is 64.1% more than the conventional CMOS active mixer.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130201630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-12-22DOI: 10.1109/IICM55040.2021.9730196
Mohammad-Amin Mohtasham-Nia, M. Yavari
In this paper, a fully-differential low-power low-noise neural recording amplifier with a novel recycling telescopic-cascode (RTC) operational transconductance amplifier (OTA) is presented. In the proposed RTC-OTA, the current recycling and positive feedback cross-coupled transistors are utilized to significantly improve the OTA's parameters such as DC gain and unity gain bandwidth. The gain enhancement also improves the linearity in the closed-loop structure. Extensive analytical calculations and simulation results using the $boldsymbol{0.18-mu mathrm{m}}$ TSMC CMOS process are provided to evaluate the usefulness of the proposed OTA. The simulated neural recording amplifier achieves 4.46 $boldsymbol{mu mathrm{V}_{text{rms}}}$ input-referred noise over 1 Hz-10 kHz bandwidth, 1.82 noise efficiency factor, -46 dB total harmonic distortion (THD) for an 18 $boldsymbol{text{mV}_{text{pp}}}$, 1kHz sinusoidal input. The power consumption is 2.25 $boldsymbol{mu mathrm{W}}$ from a 1.8-V voltage supply.
{"title":"A Low-Power Low-Noise Neural Recording Amplifier With Improved Telescopic-Cascode OTA","authors":"Mohammad-Amin Mohtasham-Nia, M. Yavari","doi":"10.1109/IICM55040.2021.9730196","DOIUrl":"https://doi.org/10.1109/IICM55040.2021.9730196","url":null,"abstract":"In this paper, a fully-differential low-power low-noise neural recording amplifier with a novel recycling telescopic-cascode (RTC) operational transconductance amplifier (OTA) is presented. In the proposed RTC-OTA, the current recycling and positive feedback cross-coupled transistors are utilized to significantly improve the OTA's parameters such as DC gain and unity gain bandwidth. The gain enhancement also improves the linearity in the closed-loop structure. Extensive analytical calculations and simulation results using the $boldsymbol{0.18-mu mathrm{m}}$ TSMC CMOS process are provided to evaluate the usefulness of the proposed OTA. The simulated neural recording amplifier achieves 4.46 $boldsymbol{mu mathrm{V}_{text{rms}}}$ input-referred noise over 1 Hz-10 kHz bandwidth, 1.82 noise efficiency factor, -46 dB total harmonic distortion (THD) for an 18 $boldsymbol{text{mV}_{text{pp}}}$, 1kHz sinusoidal input. The power consumption is 2.25 $boldsymbol{mu mathrm{W}}$ from a 1.8-V voltage supply.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134357253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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