High reliability CMOS SRAM with built-in soft defect detection

Symposium 1989 on VLSI Circuits Pub Date : 1989-05-25 DOI:10.1109/VLSIC.1989.1037496

C. Koo, T. Toms, J. Jelemensky, E. Carter, P. Smith

引用次数: 6

Abstract

circuit technique that detects all possible process defects which may cause data retention or non-static failures in a CMOS SRAM array. The technique, dubbed Soft defect detection (SDD), can accomplish the 100% static test, that was unachievable previously, in milliseconds to assure perfect data retention without relying on high temperature hake. The SDD technique has been successfully implemented into the 16K bit SRAM module of a new 32 bit microcontroller. This paper will describe a newly developed

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内置软缺陷检测的高可靠性CMOS SRAM

在CMOS SRAM阵列中检测所有可能导致数据保留或非静态故障的工艺缺陷的电路技术。该技术被称为软缺陷检测(SDD)，可以在几毫秒内完成100%的静态测试，这是以前无法实现的，以确保完美的数据保留，而不依赖于高温。该SDD技术已成功应用于一种新型32位微控制器的16K位SRAM模块中。本文将介绍一种新发展起来的

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Symposium 1989 on VLSI Circuits

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