A 6-bit pipelined analog-to-digital converter with current-switching open-loop residue amplification

Abstract

A 700-MHz 6-bit pipelined ADC with current-switching open-loop residue amplification and global-gain control is designed. Using a multiplexed-input architecture to implement T/H and MDAC circuits, the transmission-gate switching is replaced by the current-switching technique. Without the need of digital calibration, a global-gain control technique is employed to eliminate the gain error. Fabricated in a 0.13-mum CMOS technology, the ADC consumes 24 mW from a 1.2-V power supply while the active area is only 0.052 mm2.