Thin film mesh: a novel approach for noise reduction in high density and high-speed single chip packages

Abstract

The recent trend in microprocessor technology is for high speed devices (200-400 MHz) with a large number of simultaneously switching drivers. Other than providing the capability of packaging these devices with high signal I/O, the package also has to provide a low inductance path between the on chip drivers and decoupling capacitors. This is required for a low voltage distribution noise. In this paper, a multi-layer ceramic package with a thin film mesh structure on top of the ceramic substrate is described. Electrical analysis is presented to show that about 20% reduction in voltage distribution noise can be achieved for a high speed, high I/O device utilizing this package.