J. S. Filho, C. A. Costa, G. Cunha, D. Belfort, S. Catunda, E. N. Santos, M. J. Silva
{"title":"Requirements for an integrated conditioning circuit for multiphase flow imaging using impedance wire-mesh sensors","authors":"J. S. Filho, C. A. Costa, G. Cunha, D. Belfort, S. Catunda, E. N. Santos, M. J. Silva","doi":"10.1109/LASCAS.2016.7451067","DOIUrl":null,"url":null,"abstract":"This paper proposes an architecture of a conditioning circuit for dual-modality wire-mesh sensors, applied to multiphase flow measuring. The proposed circuit topology uses an AC-based impedance measurement technique, and is able to process signals from a 4×4 wire-mesh structure, performing an I/Q demodulation for the direct extraction of fluid permittivity and conductivity values. System-level considerations are taken into account to derive the requirements for the main circuit blocks, which are aimed to be integrated on standard CMOS technology.","PeriodicalId":129875,"journal":{"name":"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"446 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2016.7451067","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper proposes an architecture of a conditioning circuit for dual-modality wire-mesh sensors, applied to multiphase flow measuring. The proposed circuit topology uses an AC-based impedance measurement technique, and is able to process signals from a 4×4 wire-mesh structure, performing an I/Q demodulation for the direct extraction of fluid permittivity and conductivity values. System-level considerations are taken into account to derive the requirements for the main circuit blocks, which are aimed to be integrated on standard CMOS technology.