Effects of buried p-layers on substrate-trap induced phenomena in GaAs MESFETs

K. Kunihiro, M. Nogome, Y. Ohno
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引用次数: 5

Abstract

We investigate the effects of buried p-layers (BP-layers) on substrate-trap induced frequency dispersion of drain conductance in GaAs MESFETs. Our experiments show that the condition of the BP-layers significantly influences their effectiveness in suppressing trap-induced low-frequency anomalies. These results can be well explained by the self-backgating model. While suppressing trap-induced phenomena, a BP-layer itself may cause current transients at higher frequencies due to parasitic capacitance increase; this is also investigated in detail.
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埋置p层对GaAs mesfet中衬底陷阱诱导现象的影响
我们研究了埋入p层(bp层)对GaAs mesfet中衬底陷阱诱导的漏极电导频散的影响。我们的实验表明,bp层的条件显著影响其抑制圈闭引起的低频异常的有效性。这些结果可以用自回溯模型很好地解释。在抑制陷阱现象的同时,由于寄生电容的增加,bp层本身可能在更高频率下引起电流瞬变;对此也进行了详细的研究。
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Ion-implanted GaAs JFETs with f/sub t/>45 GHz for low-power electronics W-band InGaAs/InP PIN diode monolithic integrated switches A 500 MHz complementary gallium arsenide clock multiplier A 2 GHz 12-bit digital-to-analog converter for direct digital synthesis applications Breakdown effects on the performance and reliability of power MESFETs
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