An embedded flash macro with sub-4ns random-read-access using asymmetric-voltage-biased current-mode sensing scheme

Abstract

High-performance mobile chips and MCUs require large-capacity and fast-read embedded nonvolatile/Flash memory (eNVM/eFlash) for code and data storage. Current-mode sense amplifiers (CSA) are commonly used in eNVM due to their fast sensing against large bitline (BL) load and small cell read currents. However, conventional CSAs cannot achieve fast random read access time (TAC) due to significant summed read-path input offsets (IOS-SUM). This work proposes an asymmetric-voltage-biased CSA (AVB-CSA) to suppress IOS-SUM and enable high-speed sensing without run-time offset-cancellation operations. A 90nm AVB-CSA 1Mb Flash macro with BL-length test-modes was fabricated. The 512-rows AVB-CSA eFlash macro achieves 3.9ns TAC. The test-mode experiments confirmed that AVB-CSA improves 1.48x in TAC for 2048-rows BL-length. For the first time, a Mb eFlash with long BL achieves sub-4ns TAC.