Latch-up at RAM control circuitry

Abstract

Typically, latch-up is associated with higher input voltage at port pins as compared to power pins, Vcc, causing damage to the protection circuitry or input buffer circuitry. However, for one of the products that is manufactured in Intel, Penang, there have been a number of line yield losses due to latch-up at the RAM control circuitry which happened during burn-in. In this study we have shown the latch-up failures that occasionally caused some yield loss are related to the noise that is generated during high speed switching of transistors in the RAM. We have established the failure mechanism and root cause of the latch-up through layout, schematic and device physics analysis. Implementation of a lower burn-in frequency managed to eliminate the failure mode.