G. Piccolboni, G. Molas, C. Carabasse, J. Nodin, C. Pellissier, P. Brianceau, E. Vianello, O. Pollet, F. Perrin, J. Cluzel, A. Toffoli, F. Aussenac, V. Delaye, G. Ghibaudo, B. De Salvo, L. Perniola
{"title":"Investigation of HfO2/Ti based vertical RRAM - Performances and variability","authors":"G. Piccolboni, G. Molas, C. Carabasse, J. Nodin, C. Pellissier, P. Brianceau, E. Vianello, O. Pollet, F. Perrin, J. Cluzel, A. Toffoli, F. Aussenac, V. Delaye, G. Ghibaudo, B. De Salvo, L. Perniola","doi":"10.1109/NVMTS.2014.7060867","DOIUrl":null,"url":null,"abstract":"An easy-to-fabricate, low-cost, sidewall TiN/HfO2/Ti vertical resistive RAM (VRRAM) device is proposed. Devices with bottom electrode thickness down to 10nm were fabricated and characterized. Forming, SET and RESET voltages of respectively 2V, 0.5V and -0.5V were measured. A stable memory window of one decade was maintained after 105s at 200°C. The impact of scaling on the operating voltages and memory resistance levels was evaluated, showing a SET and RESET voltage reduction as the cell diameter is reduced. Finally the cycle-to-cycle resistance variability was addressed.","PeriodicalId":275170,"journal":{"name":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMTS.2014.7060867","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An easy-to-fabricate, low-cost, sidewall TiN/HfO2/Ti vertical resistive RAM (VRRAM) device is proposed. Devices with bottom electrode thickness down to 10nm were fabricated and characterized. Forming, SET and RESET voltages of respectively 2V, 0.5V and -0.5V were measured. A stable memory window of one decade was maintained after 105s at 200°C. The impact of scaling on the operating voltages and memory resistance levels was evaluated, showing a SET and RESET voltage reduction as the cell diameter is reduced. Finally the cycle-to-cycle resistance variability was addressed.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
