A 0.3-THz SiGe-based frequency doubler chip with 3-dB 50 GHz bandwidth and 17 dB peak conversion gain

Faisal Ahmed, M. Furqan, A. Stelzer
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引用次数: 4

Abstract

This paper presents a broadband frequency doubler chip working in the WR-03 band (220–325 GHz). The chip is implemented in a 130-nm SiGe BiCMOS technology with an of 250/300 GHz. It consists of an integrated high-gain wideband amplifier to drive the frequency doubler. The doubler is based on a cascode push-push topology. Conversion loss of the doubler is reduced by utilizing an inductive feedback in the common-base stage. A very wideband operation of the doubler is achieved using optimally sized transistors and 4-reactance based input matching network. On-wafer measurement of the chip shows a state-of-the-art 17.4 dB peak conversion gain at 270 GHz. It delivers a maximum output power of almost 1 mW with a 3-dB bandwidth ranging from 257 GHz to 307 GHz, which is the highest bandwidth for Si-based frequency doublers working entirely in the WR-03 band. The chip consumes around 429 mW from a supply voltage of 3.3 V.
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一种基于0.3 thz sigb的倍频芯片,具有3db 50ghz带宽和17db峰值转换增益
本文介绍了一种工作在WR-03频段(220-325 GHz)的宽带倍频芯片。该芯片采用130纳米SiGe BiCMOS技术,频率为250/300 GHz。它由一个集成的高增益宽带放大器驱动倍频器组成。倍频器基于级联码推-推拓扑。通过在共基级利用电感反馈来降低倍频器的转换损耗。使用最佳尺寸的晶体管和基于4电抗的输入匹配网络实现了倍频器的宽带操作。晶圆上测量显示,该芯片在270 GHz时的峰值转换增益为17.4 dB。它提供近1 mW的最大输出功率,3db带宽范围为257 GHz至307 GHz,这是完全在WR-03频段工作的硅基倍频器的最高带宽。该芯片在3.3 V的供电电压下消耗约429 mW。
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