Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230680
S. Giannakopoulos, K. Eriksson, I. Darwazeh, Z. He, H. Zirath
An ultra broadband MMIC amplifier is designed using InP double-heterojunction bipolar transistors and its on-chip measurements are reported. The multi-cell distributed amplifier uses four gain cells where each consists of a common collector input stage followed by a cascode gain stage. The chip includes bias, decoupling and terminating circuits for the dc and RF interconnects; it measures 0.72 mm by 0.4 mm. It consumes 210 mW of power and can deliver up to 5.5 dBm of output power at 195 GHz. The amplifier achieves an average gain of 13.5 dB with an overall bandwidth over 200 GHz and a ± 2 dB gain ripple. The measurements indicate that this is the widest band dc-coupled amplifier reported to date and has the highest bandwidth reported among non-cascaded distributed amplifiers.
{"title":"Ultra-broadband common collector-cascode 4-cell distributed amplifier in 250nm InP HBT technology with over 200 GHz bandwidth","authors":"S. Giannakopoulos, K. Eriksson, I. Darwazeh, Z. He, H. Zirath","doi":"10.23919/EUMIC.2017.8230680","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230680","url":null,"abstract":"An ultra broadband MMIC amplifier is designed using InP double-heterojunction bipolar transistors and its on-chip measurements are reported. The multi-cell distributed amplifier uses four gain cells where each consists of a common collector input stage followed by a cascode gain stage. The chip includes bias, decoupling and terminating circuits for the dc and RF interconnects; it measures 0.72 mm by 0.4 mm. It consumes 210 mW of power and can deliver up to 5.5 dBm of output power at 195 GHz. The amplifier achieves an average gain of 13.5 dB with an overall bandwidth over 200 GHz and a ± 2 dB gain ripple. The measurements indicate that this is the widest band dc-coupled amplifier reported to date and has the highest bandwidth reported among non-cascaded distributed amplifiers.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115627551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230741
E. McCune
Energy efficiency in communications of all types is of growing importance to society. All efficiency loss is due to power dissipation in the electronic circuitry used to implement the communication standard. Selection of the modulation adopted by a standards working group has a dominant role in how much of the energy efficiency available from electronic technologies and circuit structures can be made visible to the communications application. Prediction of whether a particular modulation in consideration will either allow implementers to realize high values of energy efficiency — or will force implementers to use circuit techniques which place a low ceiling on the achievable energy efficiency — is an important step that must be performed during modulation selection deliberations. Prediction of this efficiency cap, if any, is readily achieved by the calculation proposed in this mostly tutorial paper. An initial comparison of presently used signal modulations is provided.
{"title":"Power amplifier efficiency ceilings due to signal modulation type","authors":"E. McCune","doi":"10.23919/EUMIC.2017.8230741","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230741","url":null,"abstract":"Energy efficiency in communications of all types is of growing importance to society. All efficiency loss is due to power dissipation in the electronic circuitry used to implement the communication standard. Selection of the modulation adopted by a standards working group has a dominant role in how much of the energy efficiency available from electronic technologies and circuit structures can be made visible to the communications application. Prediction of whether a particular modulation in consideration will either allow implementers to realize high values of energy efficiency — or will force implementers to use circuit techniques which place a low ceiling on the achievable energy efficiency — is an important step that must be performed during modulation selection deliberations. Prediction of this efficiency cap, if any, is readily achieved by the calculation proposed in this mostly tutorial paper. An initial comparison of presently used signal modulations is provided.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123123231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230678
Faisal Ahmed, M. Furqan, A. Stelzer
This paper presents a broadband frequency doubler chip working in the WR-03 band (220–325 GHz). The chip is implemented in a 130-nm SiGe BiCMOS technology with an of 250/300 GHz. It consists of an integrated high-gain wideband amplifier to drive the frequency doubler. The doubler is based on a cascode push-push topology. Conversion loss of the doubler is reduced by utilizing an inductive feedback in the common-base stage. A very wideband operation of the doubler is achieved using optimally sized transistors and 4-reactance based input matching network. On-wafer measurement of the chip shows a state-of-the-art 17.4 dB peak conversion gain at 270 GHz. It delivers a maximum output power of almost 1 mW with a 3-dB bandwidth ranging from 257 GHz to 307 GHz, which is the highest bandwidth for Si-based frequency doublers working entirely in the WR-03 band. The chip consumes around 429 mW from a supply voltage of 3.3 V.
{"title":"A 0.3-THz SiGe-based frequency doubler chip with 3-dB 50 GHz bandwidth and 17 dB peak conversion gain","authors":"Faisal Ahmed, M. Furqan, A. Stelzer","doi":"10.23919/EUMIC.2017.8230678","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230678","url":null,"abstract":"This paper presents a broadband frequency doubler chip working in the WR-03 band (220–325 GHz). The chip is implemented in a 130-nm SiGe BiCMOS technology with an of 250/300 GHz. It consists of an integrated high-gain wideband amplifier to drive the frequency doubler. The doubler is based on a cascode push-push topology. Conversion loss of the doubler is reduced by utilizing an inductive feedback in the common-base stage. A very wideband operation of the doubler is achieved using optimally sized transistors and 4-reactance based input matching network. On-wafer measurement of the chip shows a state-of-the-art 17.4 dB peak conversion gain at 270 GHz. It delivers a maximum output power of almost 1 mW with a 3-dB bandwidth ranging from 257 GHz to 307 GHz, which is the highest bandwidth for Si-based frequency doublers working entirely in the WR-03 band. The chip consumes around 429 mW from a supply voltage of 3.3 V.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117018339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230671
R. Cleriti, W. Ciccognani, S. Colangeli, A. Serino, E. Limiti, P. Frijlink, M. Renvoise, R. Doerner, M. Hossain
A D-band LNA is reported serving as a test vehicle of an under-development 40 nm GaAs HEMT technology developed by OMMIC foundry. The amplifier, designed on the basis of custom small-signal equivalent-circuit models, is featured by state-of-the-art performance, and in particular has a noise figure as low as 4 dB at 140 GHz and a gain higher than 20 dB approximately from 115 GHz to 160 GHz. The main steps of the non-standard design flow are also illustrated, hinged on two main ideas: a closed-form analysis of the input/output matching bounds of the active devices, on the one hand, and an efficient optimization approach to shift the reference planes of EM-simulated networks, on the other.
{"title":"D-band LNA using a 40-nm GaAs mHEMT technology","authors":"R. Cleriti, W. Ciccognani, S. Colangeli, A. Serino, E. Limiti, P. Frijlink, M. Renvoise, R. Doerner, M. Hossain","doi":"10.23919/EUMIC.2017.8230671","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230671","url":null,"abstract":"A D-band LNA is reported serving as a test vehicle of an under-development 40 nm GaAs HEMT technology developed by OMMIC foundry. The amplifier, designed on the basis of custom small-signal equivalent-circuit models, is featured by state-of-the-art performance, and in particular has a noise figure as low as 4 dB at 140 GHz and a gain higher than 20 dB approximately from 115 GHz to 160 GHz. The main steps of the non-standard design flow are also illustrated, hinged on two main ideas: a closed-form analysis of the input/output matching bounds of the active devices, on the one hand, and an efficient optimization approach to shift the reference planes of EM-simulated networks, on the other.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115027621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230708
A. M. Bughio, S. Guerrieri, F. Bonani, G. Ghione
In this paper the sensitivity of FinFETs AC performances vs. variations of various physical parameters is analyzed at varying bias, and in particular with Independent Gates (IG) bias chosen to exploit the unique back-gating properties of these multi-gate devices. Sensitivity charts, extracted through a numerically efficient, yet accurate, physics-based TCAD simulation method, are identified as a valuable design tool for the sensitivity aware development of RF building blocks.
{"title":"RF sensitivity analysis of independent-gates FinFETs for analog applications exploiting the back-gating effect","authors":"A. M. Bughio, S. Guerrieri, F. Bonani, G. Ghione","doi":"10.23919/EUMIC.2017.8230708","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230708","url":null,"abstract":"In this paper the sensitivity of FinFETs AC performances vs. variations of various physical parameters is analyzed at varying bias, and in particular with Independent Gates (IG) bias chosen to exploit the unique back-gating properties of these multi-gate devices. Sensitivity charts, extracted through a numerically efficient, yet accurate, physics-based TCAD simulation method, are identified as a valuable design tool for the sensitivity aware development of RF building blocks.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115581697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230645
D. Muller, A. Beck, H. Massler, A. Tessmann, A. Leuther, T. Zwick, I. Kallfass
To enable beamsteering capabilities for millimeter-wave radar and communication systems, phase shifters are key components. In this paper a WR3-band (220–325 GHz) phase shifter MMIC is presented, which is based on reflective-type phase shifters and enhanced with an integrated variable gain amplifier for loss-compensation, RMS error optimization and antenna tapering. The circuit has an average loss of only 1.6 dB and a 3 dB bandwidth ranging from 218 to 268 GHz. In this frequency range the maximum phase shift is 247° with phase and amplitude RMS errors below 10.4° and 1.5 dB, respectively. The MMIC was processed in a 50 nm InGaAs metamorphic HEMT technology and has a chip size of only 0.75 × 0.75 mm2.
{"title":"A WR3-band reflective-type phase shifter MMIC with integrated amplifier for error- and loss compensation","authors":"D. Muller, A. Beck, H. Massler, A. Tessmann, A. Leuther, T. Zwick, I. Kallfass","doi":"10.23919/EUMIC.2017.8230645","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230645","url":null,"abstract":"To enable beamsteering capabilities for millimeter-wave radar and communication systems, phase shifters are key components. In this paper a WR3-band (220–325 GHz) phase shifter MMIC is presented, which is based on reflective-type phase shifters and enhanced with an integrated variable gain amplifier for loss-compensation, RMS error optimization and antenna tapering. The circuit has an average loss of only 1.6 dB and a 3 dB bandwidth ranging from 218 to 268 GHz. In this frequency range the maximum phase shift is 247° with phase and amplitude RMS errors below 10.4° and 1.5 dB, respectively. The MMIC was processed in a 50 nm InGaAs metamorphic HEMT technology and has a chip size of only 0.75 × 0.75 mm2.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130357105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230676
A. Bentini, D. Palombini, D. Rampazzo
In this contribution two robust, broadband SPDTs designed in GaN MMIC technology operating in the C-Ku Band are presented. The first SPDT is an absorptive type switch featuring 1.7 dB average insertion loss and 30 dB minimum isolation. The second SPDT is a reflective type switch featuring 1 dB minimum insertion loss and 30 dB minimum isolation. Both SPDTs have the same fit form and function and can be implemented in star configuration to realize RF signal routing and distribution for analogue beam forming networks.
{"title":"GaN MMIC SPDTs for C-Ku band beam forming networks applications","authors":"A. Bentini, D. Palombini, D. Rampazzo","doi":"10.23919/EUMIC.2017.8230676","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230676","url":null,"abstract":"In this contribution two robust, broadband SPDTs designed in GaN MMIC technology operating in the C-Ku Band are presented. The first SPDT is an absorptive type switch featuring 1.7 dB average insertion loss and 30 dB minimum isolation. The second SPDT is a reflective type switch featuring 1 dB minimum insertion loss and 30 dB minimum isolation. Both SPDTs have the same fit form and function and can be implemented in star configuration to realize RF signal routing and distribution for analogue beam forming networks.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127048133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230649
Neda Seyedhosseinzadeh, A. Nabavi, Sona Carpenter, Zhongxia Simon He, M. Bao, H. Zirath
This paper demonstrates a wideband, subharmonic down converting mixer using a commercial 130-nm SiGe-BiCMOS technology. The mixer adopts a frequency doubling LO-stage, a differential switched-transconductance RF-stage, on-chip LO and RF baluns, and two emitter-follower buffer-stages. The measured results exhibit a maximum conversion gain up to 2.6 dB over the frequency range of 100 to 140 GHz with a LO power of 5 dBm. The mixer achieves an input referred 1-dB compression point of −7.2 dBm, with a DC power of 46.3 mW, including 26.7 mW for buffer-stages. It demonstrates also up to 12 GHz 3-dB IF bandwidth, which to the authors' best knowledge, is the highest obtained among active sub-harmonic mixers operating above 100 GHz. The chip occupies 0.4 mm2, including pads.
{"title":"A 100–140 GHz SiGe-BiCMOS sub-harmonic down-converter mixer","authors":"Neda Seyedhosseinzadeh, A. Nabavi, Sona Carpenter, Zhongxia Simon He, M. Bao, H. Zirath","doi":"10.23919/EUMIC.2017.8230649","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230649","url":null,"abstract":"This paper demonstrates a wideband, subharmonic down converting mixer using a commercial 130-nm SiGe-BiCMOS technology. The mixer adopts a frequency doubling LO-stage, a differential switched-transconductance RF-stage, on-chip LO and RF baluns, and two emitter-follower buffer-stages. The measured results exhibit a maximum conversion gain up to 2.6 dB over the frequency range of 100 to 140 GHz with a LO power of 5 dBm. The mixer achieves an input referred 1-dB compression point of −7.2 dBm, with a DC power of 46.3 mW, including 26.7 mW for buffer-stages. It demonstrates also up to 12 GHz 3-dB IF bandwidth, which to the authors' best knowledge, is the highest obtained among active sub-harmonic mixers operating above 100 GHz. The chip occupies 0.4 mm2, including pads.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":" 41","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113948594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.23919/EUMIC.2017.8230660
M. Wei, R. Negra, Sheng-Fuh Chang, Yen-Huang Hsu
This paper presents an eight-phase low-phase-noise VCO using series coupling technique, which obtains less phase error compared to the parallel coupling. Furthermore, the bottom-series coupling is used to achieve better phase noise than the top-series coupling. To properly design the complementary cross-coupling pair, the impedance locus theory is adopted. The chip is implemented in 180 nm CMOS technonlogy and has a chip area of 1.88 mm2. Measured oscillation frequency is from 1.51 GHz to 1.99 GHz (27.4 %). Measured minimum phase noise is −129.23 dBc/Hz at 1MHz offset at 1.51GHz leading to a FOMt of −189.0. The measured worst phase deviation is less than ±3.6° and the core power dissipation is 18mW from a supply voltage of 1.8 V.
{"title":"Low-phase-noise eight-phase VCO using bottom series coupling technique","authors":"M. Wei, R. Negra, Sheng-Fuh Chang, Yen-Huang Hsu","doi":"10.23919/EUMIC.2017.8230660","DOIUrl":"https://doi.org/10.23919/EUMIC.2017.8230660","url":null,"abstract":"This paper presents an eight-phase low-phase-noise VCO using series coupling technique, which obtains less phase error compared to the parallel coupling. Furthermore, the bottom-series coupling is used to achieve better phase noise than the top-series coupling. To properly design the complementary cross-coupling pair, the impedance locus theory is adopted. The chip is implemented in 180 nm CMOS technonlogy and has a chip area of 1.88 mm2. Measured oscillation frequency is from 1.51 GHz to 1.99 GHz (27.4 %). Measured minimum phase noise is −129.23 dBc/Hz at 1MHz offset at 1.51GHz leading to a FOMt of −189.0. The measured worst phase deviation is less than ±3.6° and the core power dissipation is 18mW from a supply voltage of 1.8 V.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127644490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1017/S1759078718000582
Thomas Gerrer, V. Cimalla, P. Waltereit, S. Müller, Fouad Benkelifa, T. Maier, H. Czap, C. Nebel, R. Quay
We present a new bonding process for gallium nitride (AlGaN/GaN) devices from Si onto diamond substrates. In our technology AlGaN/GaN-devices are transferred from silicon (Si) onto single (SCD) and polycrystalline diamond (PCD) substrates by van der Waals bonding. Load-pull measurements on Si and sCd at 3 GHz and 50 V drain bias show comparable power-added-efficiency (PAE) and output power (Pout) levels. Also, comparisons of 2×1 mm GaN-diodes on Si, PCD, and SCD reveal significantly increased power levels. In summary, we show a promising new GaN-on-diamond technology for future high-power, microwave GaN-device applications.
{"title":"Transfer of AlGaN/GaN RF-devices onto diamond substrates via van der Waals bonding","authors":"Thomas Gerrer, V. Cimalla, P. Waltereit, S. Müller, Fouad Benkelifa, T. Maier, H. Czap, C. Nebel, R. Quay","doi":"10.1017/S1759078718000582","DOIUrl":"https://doi.org/10.1017/S1759078718000582","url":null,"abstract":"We present a new bonding process for gallium nitride (AlGaN/GaN) devices from Si onto diamond substrates. In our technology AlGaN/GaN-devices are transferred from silicon (Si) onto single (SCD) and polycrystalline diamond (PCD) substrates by van der Waals bonding. Load-pull measurements on Si and sCd at 3 GHz and 50 V drain bias show comparable power-added-efficiency (PAE) and output power (Pout) levels. Also, comparisons of 2×1 mm GaN-diodes on Si, PCD, and SCD reveal significantly increased power levels. In summary, we show a promising new GaN-on-diamond technology for future high-power, microwave GaN-device applications.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131588479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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