A 10.8pJ/bit Pulse-Position Inductive Transceiver for Low-Energy Wireless 3D Integration

Abstract

This paper presents a low-energy die-to-die inductive transceiver for use within a stacked 3D-IC. The design is implemented in a 2-tier 0.35um CMOS test chip and demonstrates vertical communication at a rate of 133Mbps/channel, across a distance of 110um, whilst consuming only 10.8pJ per transmitted bit. This represents a 5.3× improvement when compared to state-of-the-art inductive transceivers by combining: (1) 3-ary pulse-position modulation, to encode data in terms of the latency between sequential pulses (rather than using one-to-one pulse-code mappings), and (2) A tunable current driver circuit to adjust the transmit current dynamically based on the quality of the stacked die assembly.