{"title":"Statistically calculating reject limits at parametric test","authors":"D. Michelson","doi":"10.1109/IEMT.1997.626895","DOIUrl":null,"url":null,"abstract":"Known Good Die (KGD) methodology is a process used in the manufacture of semiconductor chips which determines reject limits for parameters measured at sample probe. The philosophy of KGD is to set reject limits on all sample probe parameters at x~/spl plusmn/4 s, where x~ is the sample average and s is the sample standard deviation, assuming a normal distribution on the parameter. When the distribution of measurements is normal, limits set at /spl plusmn/4 s correspond to a C/sub pk/ of 1.33. If the distribution of measurements is not normal, we examine using a generalized C/sub pk/ formula to find the KGD limits. KGD methods are also used to set limits at circuit probe and final test, after the chip has been packaged.","PeriodicalId":227971,"journal":{"name":"Twenty First IEEE/CPMT International Electronics Manufacturing Technology Symposium Proceedings 1997 IEMT Symposium","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Twenty First IEEE/CPMT International Electronics Manufacturing Technology Symposium Proceedings 1997 IEMT Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1997.626895","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Known Good Die (KGD) methodology is a process used in the manufacture of semiconductor chips which determines reject limits for parameters measured at sample probe. The philosophy of KGD is to set reject limits on all sample probe parameters at x~/spl plusmn/4 s, where x~ is the sample average and s is the sample standard deviation, assuming a normal distribution on the parameter. When the distribution of measurements is normal, limits set at /spl plusmn/4 s correspond to a C/sub pk/ of 1.33. If the distribution of measurements is not normal, we examine using a generalized C/sub pk/ formula to find the KGD limits. KGD methods are also used to set limits at circuit probe and final test, after the chip has been packaged.