A 56 Gb/s PAM-4 linear transimpedance amplifier in 0.13-μm SiGe BiCMOS technology for optical receivers

Abstract

This paper describes the implementation of a state-of-the art 56Gb/s single-channel linear transimpedance amplifier (TIA) integrated circuit for PAM-4/NRZ/DMT modulation formats used in data center interconnects (DCI) and base station front haul applications. Fabricated in 130nm SiGe BiCMOS process, the TIA has a single-ended input, differential output configuration, with nominal maximum DC transimpedance gain of ∼5.8 kQ (75 dB), gain dynamic range of 28 dB, average input referred noise (IRN) of 14.9 pA/VHz, typical bandwidth of 38 GHz across the entire gain dynamic range, Total Harmonic Distortion (THD) of 2% for output of 500mVppd, adjustable output voltage swing up to 1Vppd, all operated with typical supply of 3.3 V. At 2.8 V supply, bandwidth of 34 GHz has been achieved. Performance has been measured from −5C to 95C. The TIA has Receive Signal Strength Indicator (RSSI) for measuring the input signal strength, peak detect (PKD) function for measuring the output amplitude and in-built photo-diode (PD) cathode bias network. The chip can be operated in manual gain control (MGC) or automatic gain control (AGC) mode. The die area is 1.6 mmA2. A state-of-the art 4-level Pulse Amplitude Modulation (PAM-4) eye diagram at 56Gb/s has been demonstrated with this linear TIA. The Die has been integrated into an optical product from Discovery Semiconductors and several optical interconnect products.