{"title":"Capacitive coupling solves the known good die problem","authors":"D. Saltzman, T. Knight","doi":"10.1109/MCMC.1994.292520","DOIUrl":null,"url":null,"abstract":"Looks beyond conductive coupling to the fundamental opportunity for passing signals between chips by nonconductive means. This allows one to define a new method for testing die, wafers, or modules, which cuts costs radically for building a new variety of capacitively coupled multichip module. The test assembly can be cycled rapidly, has excellent electrical and mechanical properties, and can be exercised up to full speed at all parametric corners of extreme voltage and temperature. The test method reduces the known good die problem to the essentially software-dominated problem of testing packaged chips.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"5 4","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCMC.1994.292520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27
Abstract
Looks beyond conductive coupling to the fundamental opportunity for passing signals between chips by nonconductive means. This allows one to define a new method for testing die, wafers, or modules, which cuts costs radically for building a new variety of capacitively coupled multichip module. The test assembly can be cycled rapidly, has excellent electrical and mechanical properties, and can be exercised up to full speed at all parametric corners of extreme voltage and temperature. The test method reduces the known good die problem to the essentially software-dominated problem of testing packaged chips.<>