Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292525
R. Day, C.D. Hruska, K. Tai, R. Frye, M. Lau, P. Sullivan
To address the needs of cost driven, mixed signal applications, we have developed a silicon-on-silicon technology that incorporates both passive and active devices in the module substrate. The technology combines a simple, double-diffused epitaxial bipolar technology with our thin-film MCMs. We describe the basic elements of the technology, typical active device properties and some examples of their use in a low-cost MCM.<>
{"title":"A silicon-on-silicon multichip module technology with integrated bipolar components in the substrate","authors":"R. Day, C.D. Hruska, K. Tai, R. Frye, M. Lau, P. Sullivan","doi":"10.1109/MCMC.1994.292525","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292525","url":null,"abstract":"To address the needs of cost driven, mixed signal applications, we have developed a silicon-on-silicon technology that incorporates both passive and active devices in the module substrate. The technology combines a simple, double-diffused epitaxial bipolar technology with our thin-film MCMs. We describe the basic elements of the technology, typical active device properties and some examples of their use in a low-cost MCM.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"31 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116715053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292521
T. Hirano, A. Kimura, S. Mori
A silicon microprobing array made by the micromachining technique is proposed for testing and burn-in at the die level. The microprobing array is made on a silicon substrate to avoid misalignment caused by mismatching of the thermal expansion rates. The die to be tested is placed face down on the microprobing array surface, and compliance in the direction perpendicular to the substrate is realized by means of a membrane covering a microcavity in the silicon substrate. A microprobing array was successfully fabricated, and a basic contact experiment showed that it can establish good contact even at high temperatures. A contact resistivity of 0.5 /spl Omega/ was measured, and burn-in was successfully carried out at the die level.<>
{"title":"Silicon microprobing array for testing and burn-in","authors":"T. Hirano, A. Kimura, S. Mori","doi":"10.1109/MCMC.1994.292521","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292521","url":null,"abstract":"A silicon microprobing array made by the micromachining technique is proposed for testing and burn-in at the die level. The microprobing array is made on a silicon substrate to avoid misalignment caused by mismatching of the thermal expansion rates. The die to be tested is placed face down on the microprobing array surface, and compliance in the direction perpendicular to the substrate is realized by means of a membrane covering a microcavity in the silicon substrate. A microprobing array was successfully fabricated, and a basic contact experiment showed that it can establish good contact even at high temperatures. A contact resistivity of 0.5 /spl Omega/ was measured, and burn-in was successfully carried out at the die level.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123282437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292523
J.C. Bolger, K. Gilleo
A new type of z-axis epoxy tape adhesive, called an area bond conductive (ABC) adhesive, has been developed under ARPA contract to replace tin-lead solder for surface mounting grid array components. The ABC adhesive tapes contain discrete regions, or "dots", on pitch down to 0.2 mm, of an electrically conductive epoxy within a high strength, high T/sub g/, epoxy dielectric phase. The adhesives are supplied as die cut preforms, which match the size and bond pad pattern of the component to be attached. The preforms cure at 160-175/spl deg/C and require no pressure during cure, to yield a shock resistant, void-free area bond to any FR4 or other board surface. This paper presents bond strength, conductivity, dielectric strength, humidity and thermal shock results for daisy chain test circuits and other components attached to FR4 boards.<>
{"title":"Area bonding conductive epoxy adhesive preforms for grid array and MCM substrate attach","authors":"J.C. Bolger, K. Gilleo","doi":"10.1109/MCMC.1994.292523","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292523","url":null,"abstract":"A new type of z-axis epoxy tape adhesive, called an area bond conductive (ABC) adhesive, has been developed under ARPA contract to replace tin-lead solder for surface mounting grid array components. The ABC adhesive tapes contain discrete regions, or \"dots\", on pitch down to 0.2 mm, of an electrically conductive epoxy within a high strength, high T/sub g/, epoxy dielectric phase. The adhesives are supplied as die cut preforms, which match the size and bond pad pattern of the component to be attached. The preforms cure at 160-175/spl deg/C and require no pressure during cure, to yield a shock resistant, void-free area bond to any FR4 or other board surface. This paper presents bond strength, conductivity, dielectric strength, humidity and thermal shock results for daisy chain test circuits and other components attached to FR4 boards.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125639324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292527
E. Davidson
The multi-chip module (MCM) has yet to make its mark in the high volume computer arena but this situation should change soon. High chip and module connection densities are the drivers that will ultimately make MCMs the choice for many applications. Of course, for this to happen, they will have to be cost competitive when compared to alternative approaches. This, too, will happen. As a result, the art of designing an MCM will become a desirable skill. Designing an MCM is the first step in determining whether your application should include an MCM. This paper shows how to do that.<>
{"title":"Applications and design techniques for MCMs","authors":"E. Davidson","doi":"10.1109/MCMC.1994.292527","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292527","url":null,"abstract":"The multi-chip module (MCM) has yet to make its mark in the high volume computer arena but this situation should change soon. High chip and module connection densities are the drivers that will ultimately make MCMs the choice for many applications. Of course, for this to happen, they will have to be cost competitive when compared to alternative approaches. This, too, will happen. As a result, the art of designing an MCM will become a desirable skill. Designing an MCM is the first step in determining whether your application should include an MCM. This paper shows how to do that.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122519707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292513
J. Fan, B. Catanzaro, C.K. Cheng, S.H. Lee
This paper is the first attempt at using CAD for partitioning opto-electronic systems into opto-electronic multichip modules (OE MCM). We define a formulation for OE MCM partitioning and describe a new algorithm for optimizing this partitioning based on the minimization of the power consumption. We have implemented the algorithm by applying it to a multistage interconnect network and analyzing the improvement of the design.<>
{"title":"Partitioning of opto-electronic multichip modules","authors":"J. Fan, B. Catanzaro, C.K. Cheng, S.H. Lee","doi":"10.1109/MCMC.1994.292513","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292513","url":null,"abstract":"This paper is the first attempt at using CAD for partitioning opto-electronic systems into opto-electronic multichip modules (OE MCM). We define a formulation for OE MCM partitioning and describe a new algorithm for optimizing this partitioning based on the minimization of the power consumption. We have implemented the algorithm by applying it to a multistage interconnect network and analyzing the improvement of the design.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126616776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292519
A. Gattiker, Wojciech Maly, M. E. Thomas
This paper presents a cost-based methodology for assessing the effectiveness of various MCM implementation strategies. It is focused on testing. Two approaches to the MCM testing problem are investigated in detail. One is based on the assumption that system components are perfect("known good die" approach) and the other uses the "smart substrate" concept. An MCM using a smart substrate is one in which the substrate contains active circuitry for carrying out testing functions. For these two testing options, the obtained results suggest the existence of "windows of opportunity" for both KGD and smart substrate solutions.<>
{"title":"Are there any alternatives to \"known good die\" ? /spl lsqb/MCMs/spl rsqb/","authors":"A. Gattiker, Wojciech Maly, M. E. Thomas","doi":"10.1109/MCMC.1994.292519","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292519","url":null,"abstract":"This paper presents a cost-based methodology for assessing the effectiveness of various MCM implementation strategies. It is focused on testing. Two approaches to the MCM testing problem are investigated in detail. One is based on the assumption that system components are perfect(\"known good die\" approach) and the other uses the \"smart substrate\" concept. An MCM using a smart substrate is one in which the substrate contains active circuitry for carrying out testing functions. For these two testing options, the obtained results suggest the existence of \"windows of opportunity\" for both KGD and smart substrate solutions.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126727134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292520
D. Saltzman, T. Knight
Looks beyond conductive coupling to the fundamental opportunity for passing signals between chips by nonconductive means. This allows one to define a new method for testing die, wafers, or modules, which cuts costs radically for building a new variety of capacitively coupled multichip module. The test assembly can be cycled rapidly, has excellent electrical and mechanical properties, and can be exercised up to full speed at all parametric corners of extreme voltage and temperature. The test method reduces the known good die problem to the essentially software-dominated problem of testing packaged chips.<>
{"title":"Capacitive coupling solves the known good die problem","authors":"D. Saltzman, T. Knight","doi":"10.1109/MCMC.1994.292520","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292520","url":null,"abstract":"Looks beyond conductive coupling to the fundamental opportunity for passing signals between chips by nonconductive means. This allows one to define a new method for testing die, wafers, or modules, which cuts costs radically for building a new variety of capacitively coupled multichip module. The test assembly can be cycled rapidly, has excellent electrical and mechanical properties, and can be exercised up to full speed at all parametric corners of extreme voltage and temperature. The test method reduces the known good die problem to the essentially software-dominated problem of testing packaged chips.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"5 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120930369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292517
R. Sanaie, E. Chiprout, M. Nakhla, Q. Zhang
Moment-matching techniques have been proposed for efficient transient waveform estimation of interconnect networks used in modelling MCM's. In this paper, we introduce an approach for incorporating components characterized by measured data, within a moment matching simulation. The new method is applied using complex frequency hopping (CFH), a multipoint moment-matching technique which enables the characterization of the network up to the highest frequency of interest. It allows for the efficient analysis of large networks which include lossy, coupled transmission lines, nonlinear terminations and arbitrary components represented by simulated or measured data.<>
{"title":"Integrating subnetworks characterized by measured data into moment-matching simulations","authors":"R. Sanaie, E. Chiprout, M. Nakhla, Q. Zhang","doi":"10.1109/MCMC.1994.292517","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292517","url":null,"abstract":"Moment-matching techniques have been proposed for efficient transient waveform estimation of interconnect networks used in modelling MCM's. In this paper, we introduce an approach for incorporating components characterized by measured data, within a moment matching simulation. The new method is applied using complex frequency hopping (CFH), a multipoint moment-matching technique which enables the characterization of the network up to the highest frequency of interest. It allows for the efficient analysis of large networks which include lossy, coupled transmission lines, nonlinear terminations and arbitrary components represented by simulated or measured data.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133190133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292531
R.M. Reinschmidt, D. Leuthold
A method of distributing clock to and on a Pentium-based CPU module was designed and produced. Multiple clock driver outputs are connected in parallel and drive a PC board trace through a series termination resistor to the input of the module. On the module, the clock inputs to 20 dice are connected together and brought to a single PGA pin. The effect of varying termination resistance, PWB foil characteristic impedance, and foil length on the clock waveform characteristics including skew, edge rate, overshoot, and time of flight were determined.<>
{"title":"Clocking considerations for a Pentium-based CPU module with 512K byte secondary cache","authors":"R.M. Reinschmidt, D. Leuthold","doi":"10.1109/MCMC.1994.292531","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292531","url":null,"abstract":"A method of distributing clock to and on a Pentium-based CPU module was designed and produced. Multiple clock driver outputs are connected in parallel and drive a PC board trace through a series termination resistor to the input of the module. On the module, the clock inputs to 20 dice are connected together and brought to a single PGA pin. The effect of varying termination resistance, PWB foil characteristic impedance, and foil length on the clock waveform characteristics including skew, edge rate, overshoot, and time of flight were determined.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"401 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133108536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-15DOI: 10.1109/MCMC.1994.292538
D. Aronchick
The problem of size, weight and cost is of major concern as more and more functionality is required for increasingly sophisticated tasks. Multichip Modules (MCMs) can help to alleviate these problems by providing a solution through advanced packaging technology. Motorola continually strives to update and automate its manufacturing capabilities to remain a world class manufacturing facility. Motorola's initiatives of cycle time reduction and six sigma quality are part of the process in which problems are solved. Motorola provides the customer with all the tools and technology to produce MCMs to meet the customers need. Although there are multiple steps in the production of an MCM, from system design to assembly and test, Motorola allows the customer to enter the process at any point. To assist the customer, Motorola is developing Design Kits which allow the customer to design MCMs utilizing Motorola design rules and guidelines. This saves time and cost and provides a consistent platform and increased reliability. Motorola's extensive design capability also provides system level design and simulation, electrical design and software applications.<>
{"title":"Motorola MCM/S ASEM foundry","authors":"D. Aronchick","doi":"10.1109/MCMC.1994.292538","DOIUrl":"https://doi.org/10.1109/MCMC.1994.292538","url":null,"abstract":"The problem of size, weight and cost is of major concern as more and more functionality is required for increasingly sophisticated tasks. Multichip Modules (MCMs) can help to alleviate these problems by providing a solution through advanced packaging technology. Motorola continually strives to update and automate its manufacturing capabilities to remain a world class manufacturing facility. Motorola's initiatives of cycle time reduction and six sigma quality are part of the process in which problems are solved. Motorola provides the customer with all the tools and technology to produce MCMs to meet the customers need. Although there are multiple steps in the production of an MCM, from system design to assembly and test, Motorola allows the customer to enter the process at any point. To assist the customer, Motorola is developing Design Kits which allow the customer to design MCMs utilizing Motorola design rules and guidelines. This saves time and cost and provides a consistent platform and increased reliability. Motorola's extensive design capability also provides system level design and simulation, electrical design and software applications.<<ETX>>","PeriodicalId":292463,"journal":{"name":"Proceedings of IEEE Multi-Chip Module Conference (MCMC-94)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130031992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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