{"title":"Control of current hysteresis effects in a GaAs/n-AlGaAs quantum trap FET with embedded InAs quantum dots","authors":"H. Kim, T. Noda, T. Kawazu, H. Sakaki","doi":"10.1109/IMNC.2000.872735","DOIUrl":null,"url":null,"abstract":"We have studied various aspects of GaAs/n-AlGaAs heterojunctions with self-assembled QDs near the channel. In particular, we have shown that the V/sub g/ dependence of the electron concentration in the channel is varied by trapping one electron in each QD. However, although much work has been done on current hysteresis characteristics of QD-memory devices, comparatively little is known on the control of its direction by modulating the initial conditions and shape of QDs memory cell. This letter draws attention to a previously unnoticed variation of current hysteresis effects associated with the height of InAs QDs. We also show that the channel current hysteresis is only controllable by regulating the initial gate-to-source bias conditions.","PeriodicalId":270640,"journal":{"name":"Digest of Papers Microprocesses and Nanotechnology 2000. 2000 International Microprocesses and Nanotechnology Conference (IEEE Cat. No.00EX387)","volume":"57 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers Microprocesses and Nanotechnology 2000. 2000 International Microprocesses and Nanotechnology Conference (IEEE Cat. No.00EX387)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMNC.2000.872735","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We have studied various aspects of GaAs/n-AlGaAs heterojunctions with self-assembled QDs near the channel. In particular, we have shown that the V/sub g/ dependence of the electron concentration in the channel is varied by trapping one electron in each QD. However, although much work has been done on current hysteresis characteristics of QD-memory devices, comparatively little is known on the control of its direction by modulating the initial conditions and shape of QDs memory cell. This letter draws attention to a previously unnoticed variation of current hysteresis effects associated with the height of InAs QDs. We also show that the channel current hysteresis is only controllable by regulating the initial gate-to-source bias conditions.