O. Bon, L. Boissonnet, O. Gonnard, S. Chouteau, B. Reynard, A. Perrotin, C. Raynaud
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引用次数: 11
Abstract
We have added to a 0.13/spl mu/m thin SOI CMOS core process a high competitive SOI NLDEMOS which presents excellent power switch and analog characteristics. Measurements have demonstrated that both drift and BC design rules allow to obtain HV devices (BV > 15V) with a low S.Ron and a low leakage.
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