Seokhan Park, Bonggu Sung, H. Jung, Junhee Lim, Sang-Woo Lee, Jooyoung Lee, Won-suk Yang, Kyungseok Oh, Taeyoung Chung, Kinam Kim
{"title":"A novel method to analyze and design a NWL scheme DRAM","authors":"Seokhan Park, Bonggu Sung, H. Jung, Junhee Lim, Sang-Woo Lee, Jooyoung Lee, Won-suk Yang, Kyungseok Oh, Taeyoung Chung, Kinam Kim","doi":"10.1109/RELPHY.2008.4558996","DOIUrl":null,"url":null,"abstract":"One of the most important issues for DRAM development is the control of data retention time. A negatively-biased off-state level of the word line (NWL) was introduced to the memory cell design to improve cell transistor \"on\" current and to maintain \"off current sufficiently low. This paper discusses a method to design cell transistor and NWL bias level to improve the data retention time in DRAM with NWL.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.2008.4558996","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
One of the most important issues for DRAM development is the control of data retention time. A negatively-biased off-state level of the word line (NWL) was introduced to the memory cell design to improve cell transistor "on" current and to maintain "off current sufficiently low. This paper discusses a method to design cell transistor and NWL bias level to improve the data retention time in DRAM with NWL.
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