{"title":"Analysis of direct wafer bond IGBTs with heavily doped N+ buffer layer","authors":"S. Tu, G. Tam, P. Tam, H. Tsoi, A. Taomoto","doi":"10.1109/ISPSD.1996.509511","DOIUrl":null,"url":null,"abstract":"High-speed IGBTs fabricated using direct wafer bonding and implanted N+ buffer layer are described and analyzed in this paper. The trade-off between on-state voltage drop and turn-off fall time can be controlled by varying the N+ implant dose prior to the wafer bonding process. 800 V IGBTs with switching time less than 100 nanoseconds and V/sub ce(sat)/ as low as 1.4 V at 100 A/cm/sup 2/ have been obtained. This excellent performance is achieved without utilizing any conventional lifetime control techniques.","PeriodicalId":377997,"journal":{"name":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1996.509511","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
High-speed IGBTs fabricated using direct wafer bonding and implanted N+ buffer layer are described and analyzed in this paper. The trade-off between on-state voltage drop and turn-off fall time can be controlled by varying the N+ implant dose prior to the wafer bonding process. 800 V IGBTs with switching time less than 100 nanoseconds and V/sub ce(sat)/ as low as 1.4 V at 100 A/cm/sup 2/ have been obtained. This excellent performance is achieved without utilizing any conventional lifetime control techniques.