S. Azuma, Ryotatsu Yanagimoto, S. Kamitani, M. Edamoto, K. Arata, H. Matsui, H. Akada, R. Masuda, K. Hoshino, K. Nagura, H. Ogawa
{"title":"1.25Gbps optical links for mobile handsets","authors":"S. Azuma, Ryotatsu Yanagimoto, S. Kamitani, M. Edamoto, K. Arata, H. Matsui, H. Akada, R. Masuda, K. Hoshino, K. Nagura, H. Ogawa","doi":"10.1109/ASSCC.2008.4708722","DOIUrl":null,"url":null,"abstract":"This paper presents a 1.25 Gbps optical links design for mobile handsets. The system consists of an optical connector and a SER/DES main chip. The former contains an 850 nm VCSEL (vertical cavity surface emission laser), a GaAs-PIN photodiode and a transimpedance amplifier (TIA). The later includes a serializer, a deserializer, a VCSEL driver, a limiting amplifier, a PLL and a CDR. The chip and TIA were fabricated in a 0.13 um CMOS process with MIM capacitors. A digital type CDR with fine timing controls allows sharing a VCO between transmitter and receiver, resulting in reduced both power consumption and silicon area. The system fully demonstrated a 1.25 Gbps data and video stream transmission, consuming 108.4 mW of power under 1.2 V/3.3 V supply voltages.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708722","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a 1.25 Gbps optical links design for mobile handsets. The system consists of an optical connector and a SER/DES main chip. The former contains an 850 nm VCSEL (vertical cavity surface emission laser), a GaAs-PIN photodiode and a transimpedance amplifier (TIA). The later includes a serializer, a deserializer, a VCSEL driver, a limiting amplifier, a PLL and a CDR. The chip and TIA were fabricated in a 0.13 um CMOS process with MIM capacitors. A digital type CDR with fine timing controls allows sharing a VCO between transmitter and receiver, resulting in reduced both power consumption and silicon area. The system fully demonstrated a 1.25 Gbps data and video stream transmission, consuming 108.4 mW of power under 1.2 V/3.3 V supply voltages.