Approach to solve the reliability problem at packaging level in the matrix VLSI

I. Vasiltsov, B. Mandziy, A. Bench
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Abstract

In this paper the problem of increasing the reliability of the designed devices, implemented on the matrix VLSI has been considered. The proposed approach consists in choosing of the special area in the chip during mapping procedure at the packaging level. Usage of such approach allows for the designer to obtain a more optimal topology solution, and thus will increase the reliability of designed devices.
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矩阵型VLSI封装级可靠性问题的解决方法
本文研究了如何在矩阵式VLSI上实现所设计器件的可靠性。所提出的方法包括在封装层的映射过程中选择芯片中的特殊区域。使用这种方法允许设计人员获得更优的拓扑解决方案,从而将增加设计器件的可靠性。
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