Low temperature in-situ phosphorus doped single-crystal silicon emitters for application in SiGe HBTs

ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575) Pub Date : 2002-12-19 DOI:10.1109/SMELEC.2002.1217812

A.I. Abdul-Rahim, C. Marsh, P. Ashburn, G. Booker

{"title":"Low temperature in-situ phosphorus doped single-crystal silicon emitters for application in SiGe HBTs","authors":"A.I. Abdul-Rahim, C. Marsh, P. Ashburn, G. Booker","doi":"10.1109/SMELEC.2002.1217812","DOIUrl":null,"url":null,"abstract":"SiGe Heterojunction Bipolar Transistors (HBTs) require low temperature processing in order to minimize Boron-out diffusion from the base region. In this paper a novel technique of producing low temperature in-situ Phosphorus doped single-crystal silicon emitters for application in SiGe HBTs is presented. The single-crystal silicon was deposited at a temperature of 670/spl deg/C in a UHV-compatible LPCVD cluster tool. Gummel plots of the fabricated transistors show very ideal base and collector current characteristics. An ultra low emitter resistance of 6.6 /spl Omega/./spl mu/m/sup 2/ was also obtained. The very low emitter resistance is due to very low oxygen dose of 5.3/spl times/10/sup 13/ cm/sup -2/ at the single-crystal silicon emitter/silicon substrate interface. The commercial Silvaco TCAD ATHENA and ATLAS were used to model the DC characteristics of the transistor to validate the results.","PeriodicalId":211819,"journal":{"name":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2002.1217812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

Abstract

SiGe Heterojunction Bipolar Transistors (HBTs) require low temperature processing in order to minimize Boron-out diffusion from the base region. In this paper a novel technique of producing low temperature in-situ Phosphorus doped single-crystal silicon emitters for application in SiGe HBTs is presented. The single-crystal silicon was deposited at a temperature of 670/spl deg/C in a UHV-compatible LPCVD cluster tool. Gummel plots of the fabricated transistors show very ideal base and collector current characteristics. An ultra low emitter resistance of 6.6 /spl Omega/./spl mu/m/sup 2/ was also obtained. The very low emitter resistance is due to very low oxygen dose of 5.3/spl times/10/sup 13/ cm/sup -2/ at the single-crystal silicon emitter/silicon substrate interface. The commercial Silvaco TCAD ATHENA and ATLAS were used to model the DC characteristics of the transistor to validate the results.

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

低温原位磷掺杂单晶硅发射体在SiGe HBTs中的应用

SiGe异质结双极晶体管(hbt)需要低温处理，以尽量减少硼从基区扩散。本文介绍了一种低温原位掺磷单晶硅发射体的制备方法。单晶硅在670/spl℃的温度下，在特高压兼容的LPCVD簇状工具中沉积。所制晶体管的Gummel图显示出非常理想的基极和集电极电流特性。超低发射极电阻6.6 /spl ω /。/spl mu/m/sup 2/。极低的发射极电阻是由于在单晶硅发射极/硅衬底界面处的极低氧剂量为5.3/spl倍/10/sup 13/ cm/sup -2/。使用商用Silvaco TCAD ATHENA和ATLAS对晶体管的直流特性进行建模以验证结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文去求助

来源期刊

ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)

自引率

0.00%

发文量