A no-trimming SLIC two-chip set with coin telephone signaling facilities

M. Akata, Y. Nagataki, K. Koyabu, K. Mukai, S. Yoshida, I. Ueki
{"title":"A no-trimming SLIC two-chip set with coin telephone signaling facilities","authors":"M. Akata, Y. Nagataki, K. Koyabu, K. Mukai, S. Yoshida, I. Ueki","doi":"10.1109/CICC.1989.56771","DOIUrl":null,"url":null,"abstract":"A subscriber line interface circuit (SLIC) two-chip set is presented. It eliminates off-chip function trimming and contains integrated coin telephone set facilities and BORSCHT functions. The set consists of: (a) the subscriber interface LSI, a 320-V dielectrically isolated bipolar LSI with on-chip thin-film resistors and double-layer metal; and (b) the subscriber processor LSI, a 1.6 μm CMOS LSI with oversampling A-D/D-A converters and a microprogrammable digital signal processor. The chip sizes are 5.5 mm×6.06 mm and 6.0 mm×5.7 mm, respectively. With the two-chip set, a SLIC for coin telephone set interface can be established without high-precision filter components or hybrid ICs with their function trimming","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"61 27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56771","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

A subscriber line interface circuit (SLIC) two-chip set is presented. It eliminates off-chip function trimming and contains integrated coin telephone set facilities and BORSCHT functions. The set consists of: (a) the subscriber interface LSI, a 320-V dielectrically isolated bipolar LSI with on-chip thin-film resistors and double-layer metal; and (b) the subscriber processor LSI, a 1.6 μm CMOS LSI with oversampling A-D/D-A converters and a microprogrammable digital signal processor. The chip sizes are 5.5 mm×6.06 mm and 6.0 mm×5.7 mm, respectively. With the two-chip set, a SLIC for coin telephone set interface can be established without high-precision filter components or hybrid ICs with their function trimming
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种带有投币电话信号设施的无修边SLIC双芯片装置
提出了一种用户线路接口电路(SLIC)双芯片组。它消除了片外功能修剪,并包含集成的投币电话机设施和BORSCHT功能。该装置包括:(a)用户接口LSI,采用片上薄膜电阻和双层金属的320v介电隔离双极LSI;(b)用户处理器LSI, 1.6 μm CMOS LSI,带过采样a - d /D-A转换器和微可编程数字信号处理器。芯片尺寸分别为5.5 mm×6.06 mm和6.0 mm×5.7 mm。采用双芯片组,无需高精度滤波元件或功能微调的混合集成电路,即可建立投币电话机接口的SLIC
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A 1.4 ns/64 kb RAM with 85 ps/3680 logic gate array A gate matrix deformation and three-dimensional maze routing for dense MOS module generation A submicron CMOS triple level metal technology for ASIC applications Hot carrier effects on CMOS circuit performance The QML-an approach for qualifying ASICs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1