A fast adder design using signed-digit numbers and ternary logic

Abstract

The advantage of carry free addition offered by signed-digit numbers is exploited in designing a fast adder circuit. Signed-digit numbers with radix 2 and digit set (-1,0,1), called redundant binary signed-digit (RBSD) numbers, are used in the design. Ternary logic circuits using an MOS/CMOS combination are employed. The ternary logic and RBSD number system complement each other well because one ternary bit can support one RBSD digit. This provides an advantage over using binary logic where more than one bit would be needed to support one RBSD digit. While the RBSD number system offers faster add times because of carry free addition, ternary logic offers reduced circuit complexity in terms of both transistor count and interconnections. All circuit implementations were simulated and verified for satisfactory performance using SPICE software on a SUN workstation.<>