PLASMA: a FSM design kernel

Third Annual IEEE Proceedings on ASIC Seminar and Exhibit Pub Date : 1990-09-17 DOI:10.1109/ASIC.1990.186202

R. Puri, M. Hasan

引用次数: 1

Abstract

A state machine synthesis system, named PLASMA, which can be used for the implementation of finite-state machines (FSMs) in programmable logic arrays (PLAs) is discussed. The minimization algorithm effectively prunes the tree structure of compatibles list to find the minimum form of a minimized single output change (SOC) machine. State assignment, i.e. the process of binary encoding of internal states of the FSM, has been efficiently utilized to save the silicon area occupied by PLA. The system is complete and works efficiently for incompletely specified sequential machines (ISSMs) to achieve area optimization in the PLA structure.<>

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

PLASMA: FSM设计内核

讨论了一种可用于实现可编程逻辑阵列(PLAs)中有限状态机(fsm)的状态机综合系统PLASMA。最小化算法有效地对兼容列表的树状结构进行剪枝，从而找到最小化单输出变化机的最小形式。有效地利用状态分配，即对FSM内部状态进行二进制编码的过程，节省了PLA占用的硅面积。该系统是完整的，可以有效地用于非完全指定顺序机(issm)，以实现PLA结构的面积优化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文去求助

来源期刊

Third Annual IEEE Proceedings on ASIC Seminar and Exhibit

自引率

0.00%

发文量

期刊最新文献

A development system for an SRAM-based user-reprogrammable gate array Automated CAE tools for full custom design of bipolar analog ASICs A 200 MHz 100 K ECL output buffer for CMOS ASICs Multi circular buffer controller chip for advanced ESM system Rapid prototyping, is there an educational dilemma? (ASIC design)