{"title":"Programmable pacing channel with a fully on-chip LDO regulator for cardiac pacemaker","authors":"Chih-Jen Cheng, Chung-Jui Wu, Shuenn-Yuh Lee","doi":"10.1109/ASSCC.2008.4708783","DOIUrl":null,"url":null,"abstract":"A novel dual-voltage pacing system for implant pacemaker is presented in this paper. In order to reduce supply voltage ripple and diminish process variation imposed on the divided-resistor, a fully on-chip low-dropout (LDO) regulator is proposed. Meanwhile, the adjustable pacing circuit together with a sense feedback is employed to deliver electrical stimuli of 16-step amplitudes to induce cardiac contraction. The pacing circuit with a LDO regulator was fabricated in TSMC 0.35-mum CMOS technology, consuming total power of 1.29 muW including 185 nA of ground current in 1.2-V LDO and having a power consumption of 30 nW in the 1-V pacing step controller. Experimental results demonstrate that the proposed LDO regulator features a power-supply rejection ratio (PSRR) of -30 dB with the output ripple of 570 muVpp under the input sinusoidal wave of 19.6 mVpp. Even with the load current up to 10 muA, LDO yields a line regulation that is less than 3% deviation.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708783","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21
Abstract
A novel dual-voltage pacing system for implant pacemaker is presented in this paper. In order to reduce supply voltage ripple and diminish process variation imposed on the divided-resistor, a fully on-chip low-dropout (LDO) regulator is proposed. Meanwhile, the adjustable pacing circuit together with a sense feedback is employed to deliver electrical stimuli of 16-step amplitudes to induce cardiac contraction. The pacing circuit with a LDO regulator was fabricated in TSMC 0.35-mum CMOS technology, consuming total power of 1.29 muW including 185 nA of ground current in 1.2-V LDO and having a power consumption of 30 nW in the 1-V pacing step controller. Experimental results demonstrate that the proposed LDO regulator features a power-supply rejection ratio (PSRR) of -30 dB with the output ripple of 570 muVpp under the input sinusoidal wave of 19.6 mVpp. Even with the load current up to 10 muA, LDO yields a line regulation that is less than 3% deviation.