Appendix A4: Finite State Machines Using Verilog Behavioural Mode

Abstract

In this book finite state machines (FSMs) have been implemented using the equations obtained from the state diagram/Petri net. This approach ensures that the logic for the state machine is under complete control of the designer. However, if the state machine is implemented using behavioural mode, the Verilog compiler will optimize the design. Remember that the behavioural method describes the behaviour of the designed system. There is a very close relationship between the state diagram and the behavioural Verilog description that allows a direct translation from the state diagram to the Verilog code.