Design of a K-band fast hopping frequency synthesizer

Zhicheng Hu, Guolin Sun
{"title":"Design of a K-band fast hopping frequency synthesizer","authors":"Zhicheng Hu, Guolin Sun","doi":"10.1109/ICAM.2017.8242155","DOIUrl":null,"url":null,"abstract":"The design and implementation of a K-band fast hopping frequency synthesizer based on DDS and PLL is described. Main technical specifications are as follows: frequency ranges from 24GHz to 27GHz, step frequency is 50MHz and lock time is less than 150ns. The parameters of loop filter and the analyses of phase noise and lock time are provided by MATLAB simulation to verify the feasibility of the design. Final test results of the circuits proves that the targets of performance are achieved.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAM.2017.8242155","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

The design and implementation of a K-band fast hopping frequency synthesizer based on DDS and PLL is described. Main technical specifications are as follows: frequency ranges from 24GHz to 27GHz, step frequency is 50MHz and lock time is less than 150ns. The parameters of loop filter and the analyses of phase noise and lock time are provided by MATLAB simulation to verify the feasibility of the design. Final test results of the circuits proves that the targets of performance are achieved.
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k波段快跳频合成器的设计
介绍了一种基于DDS和锁相环的k波段快跳频合成器的设计与实现。主要技术指标:频率范围24GHz ~ 27GHz,阶跃频率50MHz,锁定时间小于150ns。通过MATLAB仿真给出了环路滤波器的参数,并对相位噪声和锁相时间进行了分析,验证了设计的可行性。最终测试结果表明,电路达到了性能指标。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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