S. SunitaM., D. MayurG., Preet Bedi, Nagesh Verma, Shashidhar Tantry
{"title":"50 MHz 3-Level Buck Converter with added Boost Converter","authors":"S. SunitaM., D. MayurG., Preet Bedi, Nagesh Verma, Shashidhar Tantry","doi":"10.1109/ISOCC50952.2020.9333088","DOIUrl":null,"url":null,"abstract":"This paper presents a 50MHz, 3.5V input and 0.6- 3.12V output, 3-Level Buck Converter with the inclusion of a calibration circuit to ensure a constant voltage across the flying capacitor. Additionally, a Boost Converter is designed to increase the max output voltage level to 5.8V. All the circuits and their blocks are designed and simulated in 45nm CMOS technology on Cadence virtuoso. Peak efficiency is observed to be 90.3% for 3-Level Buck Converter and 93.6% for the modified Boost Converter.","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9333088","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a 50MHz, 3.5V input and 0.6- 3.12V output, 3-Level Buck Converter with the inclusion of a calibration circuit to ensure a constant voltage across the flying capacitor. Additionally, a Boost Converter is designed to increase the max output voltage level to 5.8V. All the circuits and their blocks are designed and simulated in 45nm CMOS technology on Cadence virtuoso. Peak efficiency is observed to be 90.3% for 3-Level Buck Converter and 93.6% for the modified Boost Converter.
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