An efficient logic/circuit mixed-mode simulator for analysis of power supply voltage fluctuation

M. Miyama, G. Yokomizo, M. Iwabuchi, M. Kinoshita
{"title":"An efficient logic/circuit mixed-mode simulator for analysis of power supply voltage fluctuation","authors":"M. Miyama, G. Yokomizo, M. Iwabuchi, M. Kinoshita","doi":"10.1109/ASPDAC.1995.486247","DOIUrl":null,"url":null,"abstract":"A mixed-mode simulator is described that can simulate voltage fluctuations in the power supply network. Current flow due to logic events is taken into account in order to predict the voltage fluctuations. The difference between the maximum voltage fluctuations calculated by the proposed mixed-mode simulation and these calculated by conventional circuit simulation are within 20%, and we demonstrated the feasibility of the proposed simulation by simulating an entire MOS memory chip (36,000 transistors) in 75 minutes on an HP9000/735.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486247","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

A mixed-mode simulator is described that can simulate voltage fluctuations in the power supply network. Current flow due to logic events is taken into account in order to predict the voltage fluctuations. The difference between the maximum voltage fluctuations calculated by the proposed mixed-mode simulation and these calculated by conventional circuit simulation are within 20%, and we demonstrated the feasibility of the proposed simulation by simulating an entire MOS memory chip (36,000 transistors) in 75 minutes on an HP9000/735.
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一种用于分析电源电压波动的高效逻辑/电路混合模式模拟器
介绍了一种能够模拟供电网络中电压波动的混合模式模拟器。为了预测电压波动,考虑了由逻辑事件引起的电流。所提出的混合模式仿真计算的最大电压波动与传统电路仿真计算的最大电压波动之间的差异在20%以内,并且我们通过在HP9000/735上在75分钟内模拟整个MOS存储芯片(36,000个晶体管)来证明所提出的仿真的可行性。
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