Characterization of the immunity of integrated circuits (ICs) at wafer level

Andrea Lavarda, Dominik Amschl, S. Bauer, B. Deutschmann
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引用次数: 1

Abstract

This paper deals with the characterization of the immunity of integrated circuits (ICs) by means of their susceptibility to conducted radio frequency (RF) electromagnetic interferences (EMI). It describes and analyses a framework to perform such characterization at wafer level, highlighting the benefits that are reaped from it and the problems that can be faced during the test bench setup and the measurement procedure, providing some possible solutions.
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晶圆级集成电路抗扰度的表征
本文通过对传导射频电磁干扰(EMI)的敏感性来研究集成电路(ic)的抗扰度。它描述和分析了在晶圆级执行这种表征的框架,强调了从中获得的好处以及在测试台架设置和测量过程中可能面临的问题,并提供了一些可能的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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