A VLSI fuzzy logic inference engine for real-time process control

1989 Proceedings of the IEEE Custom Integrated Circuits Conference Pub Date : 1989-05-15 DOI:10.1109/CICC.1989.56741

W. Dettloff, K. E. Yount

引用次数: 35

Abstract

The single-chip implementation of a general-purpose fuzzy logic inference engine is described. Features include a dynamically reconfigurable and cascadable architecture, TTL (transistor-transistor logic)-compatible host interface, laser-programmed redundancy, special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification. Up to 102 parallel rules can be processed in real-time control applications by utilizing a 1-μm, 3.3-V DLM CMOS technology. 580 KFLIPS (fuzzy logic inferences per second) are attained using 688 K transistors and 36-MHz operation

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用于实时过程控制的VLSI模糊逻辑推理引擎

介绍了一种通用模糊逻辑推理引擎的单片机实现。功能包括动态可重构和可级联架构，TTL(晶体管-晶体管逻辑)兼容的主机接口，激光编程冗余，可测试性的特殊模式，RAM规则存储，以及片上模糊化和去模糊化。采用1 μm、3.3 v DLM CMOS技术，可在实时控制应用中处理多达102条并行规则。580 KFLIPS(每秒模糊逻辑推理)使用688 K晶体管和36 mhz操作

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1989 Proceedings of the IEEE Custom Integrated Circuits Conference

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