I/sub DDQ/-testability of tree circuits

Abstract

The quality of CMOS circuits can be increased by performing I/sub DDQ/ testing. For regular circuits constructed from identical modules, defects localized to a single module detectable by current testing can be sensitized by exhaustively applying all input patterns to each circuit module. Regular circuits for which every module in arbitrarily large circuit can have all input patterns applied are defined to be I/sub DDQ/-testable. The I/sub DDQ/-testing properties of a class of regular circuits called tress are investigated. We present the conditions for one-dimensional and tree array circuits to be I/sub DDQ/-testable. We also present conditions for these circuits to be CI/sub DDQ/-testable, that is, I/sub DDQ/-testable with a constant number of tests independent of the circuit's size. Practical circuits such as comparators and carry-lookahead adders are used to illustrate the derived conditions.