Analog MAP decoder for (8, 4) Hamming code in subthreshold CMOS

C. Winstead, Jie Dai, Woo Jin Kim, S. Little, Yong-Bin Kim, C. Myers, C. Schlegel
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引用次数: 35

Abstract

An all-MOS analog implementation of a MAP decoder is presented for the (8, 4) extended Hamming code. This paper describes the design and analysis of a tail-biting trellis decoder implementation using subthreshold CMOS devices. A VLSI test chip has recently returned from fabrication, and preliminary test results indicate accurate decoding up to 20 MBit/s.
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亚阈值CMOS中(8,4)汉明码的模拟MAP解码器
提出了一种用于(8,4)扩展汉明码的MAP解码器的全mos模拟实现。本文介绍了一种基于亚阈值CMOS器件的咬尾网格解码器的设计与分析。VLSI测试芯片最近从制造中返回,初步测试结果表明精确解码高达20 MBit/s。
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