Integrated interconnect circuit modeling for VLSI design

Abstract

An integrated interconnect modelling system, SIMS, is developed with parametrized modeling of interconnect and an interface with schematic capture and editor. SIMS automatically drives numerical interconnect simulation as directed by technology engineers, creates a polynomial model library for interconnect parasitics, generates a netlist including the SPICE model for the interconnect structure, automatically drives circuit simulations and displays the simulation results through an advanced GUI. VLSI design with SIMS makes it possible to consider parasitic effects fast and accurately, which becomes more important in deep submicron circuit design. With this capability, circuit design with optimized interconnect layout can be achieved. Ultimately, the integrated system helps to reduce the cost of technology development and the time to market by building up the concept of design for manufacturability.