Designing a VLSI microprocessor for emulation

Third Annual IEEE Proceedings on ASIC Seminar and Exhibit Pub Date : 1990-09-17 DOI:10.1109/ASIC.1990.186124

R. Rivin, J. Potts

引用次数: 0

Abstract

The performance of high-speed digital signal processors (DSPs) poses a challenge to real-time in-circuit emulation. Because DSPs are optimized to perform arithmetic calculations in less than 50 ns, internal and external data buses can change at rates in excess of 20 million times per second. The capture and tracking of these signals and the control of the processor is the essence of real-time in-circuit emulation. In order to support high-performance emulation, these issues were emphasized during the specification and design of a DSP. The system-level requirements that drive design considerations to allow emulation of this VLSI circuit are discussed.<>

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设计一种用于仿真的VLSI微处理器

高速数字信号处理器(dsp)的性能对实时电路仿真提出了挑战。由于dsp被优化为在不到50 ns的时间内执行算术计算，内部和外部数据总线可以以每秒超过2000万次的速率变化。对这些信号的捕获和跟踪以及处理器的控制是实时在线仿真的核心。为了支持高性能仿真，这些问题在DSP的规范和设计中得到了强调。讨论了驱动设计考虑的系统级要求，以允许对该VLSI电路进行仿真。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Third Annual IEEE Proceedings on ASIC Seminar and Exhibit

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