Gilles Fourneris, N. Bekkara, J. Benkoski, L. Zullino, Dino Spatafora, G. Martino
{"title":"Demosthenes-A technology-independent power DMOS layout generator","authors":"Gilles Fourneris, N. Bekkara, J. Benkoski, L. Zullino, Dino Spatafora, G. Martino","doi":"10.1109/EURDAC.1993.410634","DOIUrl":null,"url":null,"abstract":"A methodology to automate DMOS layout generation starting from electrical specifications is presented. The main features of the Demosthenes technology independent layout generator that make it possible to synthesize lateral and vertical DMOS in different low and high voltage technologies are described. The built-in electrical model used by the generator to extract the device layout resistance is exposed and the accuracy of the model, ranging from 1% to 15%, is reported, according to comparisons with silicon measurements. In the future, the Demosthenes generator will be extended to support the next generation of BCD technology. In addition, electrical modeling capabilities will be improved by generating detailed electrical simulation models that make it possible to accurately simulate DMOS switching.<<ETX>>","PeriodicalId":339176,"journal":{"name":"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference","volume":"145 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURDAC.1993.410634","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A methodology to automate DMOS layout generation starting from electrical specifications is presented. The main features of the Demosthenes technology independent layout generator that make it possible to synthesize lateral and vertical DMOS in different low and high voltage technologies are described. The built-in electrical model used by the generator to extract the device layout resistance is exposed and the accuracy of the model, ranging from 1% to 15%, is reported, according to comparisons with silicon measurements. In the future, the Demosthenes generator will be extended to support the next generation of BCD technology. In addition, electrical modeling capabilities will be improved by generating detailed electrical simulation models that make it possible to accurately simulate DMOS switching.<>
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