A custom processor for use in a parallel computer system

D. Wilde
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引用次数: 1

Abstract

A 440000-transistor, full-custom CMOS processor that is used as the basis of a parallel computer system is described. The primary design goal was to produce a processor that performed roughly an order of magnitude faster than its predecessor. The author discusses the chip-level architecture of the processor, comparing it to the original design, and shows what was done architecturally to increase the performance by an order of magnitude
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一种用于并行计算机系统的自定义处理器
描述了一种用于并行计算机系统基础的440,000晶体管全定制CMOS处理器。主要的设计目标是生产一种处理器,其运行速度比其前身大约快一个数量级。作者讨论了处理器的芯片级架构,将其与原始设计进行了比较,并展示了在架构上所做的工作,以提高一个数量级的性能
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A 1.4 ns/64 kb RAM with 85 ps/3680 logic gate array A gate matrix deformation and three-dimensional maze routing for dense MOS module generation A submicron CMOS triple level metal technology for ASIC applications Hot carrier effects on CMOS circuit performance The QML-an approach for qualifying ASICs
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