P. Leber, W. Baumberger, M. Lang, M. Rieger-Motzer, W. Bronner, A. Hulsmann, B. Raynor
{"title":"A completely integrated single-chip phase-locked loop with a 15 GHz VCO using 0.2 /spl mu/m E-/D-HEMT-technology","authors":"P. Leber, W. Baumberger, M. Lang, M. Rieger-Motzer, W. Bronner, A. Hulsmann, B. Raynor","doi":"10.1109/GAAS.1996.567744","DOIUrl":null,"url":null,"abstract":"A completely integrated single-chip phase-locked loop was designed using a 0.2 /spl mu/m-enhancement/depletion AlGaAs/GaAs/AlGaAs-HEMT technology. The chip contains a VCO with 15 GHz center frequency, as well as a frequency divider, a phase detector, and a loop filter. The fabricated chip size is 1.5/spl times/1.5 mm/sup 2/. The power consumption is 0.5 W using a supply voltage of 5.0 V. The lock range is approximately /spl plusmn/270 MHz. The phase noise is -100 dBc/Hz at 100 kHz and -107 dBc/Hz at 1 MHz offset from the carrier, respectively.","PeriodicalId":365997,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium. 18th Annual Technical Digest 1996","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1996.567744","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A completely integrated single-chip phase-locked loop was designed using a 0.2 /spl mu/m-enhancement/depletion AlGaAs/GaAs/AlGaAs-HEMT technology. The chip contains a VCO with 15 GHz center frequency, as well as a frequency divider, a phase detector, and a loop filter. The fabricated chip size is 1.5/spl times/1.5 mm/sup 2/. The power consumption is 0.5 W using a supply voltage of 5.0 V. The lock range is approximately /spl plusmn/270 MHz. The phase noise is -100 dBc/Hz at 100 kHz and -107 dBc/Hz at 1 MHz offset from the carrier, respectively.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
