An Ultra-Low Power Wake-up Receiver Digital Controller for 5.8 GHz DSRC Applications

Abstract

In this paper, an ultra-low power digital controller for 5.8 GHz dedicated short-range communication (DSRC) radio frequency (RF) wake-up receiver (WuRx) is proposed. It improves WuRx reliability, accuracy and enhances battery life by filtering non-wake-up signals. The digital hysteresis is introduced for configurable valid wake-up signal frequency range identification. The programmable successive number of valid wake-up signal cycles are confirmed before generating wake-up interrupt. From 0.9 V supply, it draws 38.5 nA current and consumes only 34.65 nW power. The configurable controller is fully synthesizable, requires 786 gates for its implementation in 130 nm CMOS process with 90 × 80 μm2chip area.