No pumping at 450°C with electrodeposited copper TSV

K. Kondo, Shingo Mukahara, M. Yokoi, J. Onuki
{"title":"No pumping at 450°C with electrodeposited copper TSV","authors":"K. Kondo, Shingo Mukahara, M. Yokoi, J. Onuki","doi":"10.1109/ICEP.2016.7486827","DOIUrl":null,"url":null,"abstract":"Thermal expansion coefficient(TEC) mismatch between the silicon and copper causes serious problems in on chip and microelectronics packaging. One example is TSV pumping for the via middle process. Higher temperature exposure of 400-600°C during the wiring process causes TSV pumping. The filled copper destroys wiring above TSV. Our additive A shows no pumping of electrodeposited copper TSV. The resistivity of electrodeposited copper TSV after 450°C annealing for the wiring is only 1.09 of conventional electrodeposited copper. Another example is the PCB warpage in solder bumps reflow process. The PCB is initially annealed at 200°C for 60min for the resin solidification. Next, the solder bumps are formed. Then comes the chip and PCB interconnection of 250°C, 10sec with solder bumps retlow. This chip and PCB interconnection annealing at 250°C, 10sec has used to cause PCB warpage. The 34% TEC reduction has been realized at 230 °C . This 34% reduction has been obtained after the second annealing after 200°Cx60min with our additive B. The resistivity of PCB copper after annealing is only 1.32 of conventional electrodeposited copper.","PeriodicalId":253726,"journal":{"name":"2015 International 3D Systems Integration Conference (3DIC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International 3D Systems Integration Conference (3DIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEP.2016.7486827","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

Thermal expansion coefficient(TEC) mismatch between the silicon and copper causes serious problems in on chip and microelectronics packaging. One example is TSV pumping for the via middle process. Higher temperature exposure of 400-600°C during the wiring process causes TSV pumping. The filled copper destroys wiring above TSV. Our additive A shows no pumping of electrodeposited copper TSV. The resistivity of electrodeposited copper TSV after 450°C annealing for the wiring is only 1.09 of conventional electrodeposited copper. Another example is the PCB warpage in solder bumps reflow process. The PCB is initially annealed at 200°C for 60min for the resin solidification. Next, the solder bumps are formed. Then comes the chip and PCB interconnection of 250°C, 10sec with solder bumps retlow. This chip and PCB interconnection annealing at 250°C, 10sec has used to cause PCB warpage. The 34% TEC reduction has been realized at 230 °C . This 34% reduction has been obtained after the second annealing after 200°Cx60min with our additive B. The resistivity of PCB copper after annealing is only 1.32 of conventional electrodeposited copper.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
在450°C电沉积铜TSV时不泵送
硅和铜之间的热膨胀系数(TEC)不匹配导致了片上和微电子封装中的严重问题。一个例子是通过中间过程的TSV泵送。在布线过程中,400-600°C的高温暴露会导致TSV泵送。填充的铜会破坏TSV以上的线路。我们的添加剂A显示电沉积铜TSV没有泵送。电线用电沉积铜TSV经450℃退火后的电阻率仅为传统电沉积铜的1.09。另一个例子是回流焊过程中的PCB翘曲。PCB最初在200°C退火60min用于树脂固化。接下来,焊料凸起形成。然后是芯片和PCB的互连,250°C, 10秒与焊料凸起回流。这种芯片与PCB互连在250℃下退火,10sec已经用来造成PCB翘曲。在230°C时,TEC降低了34%。用我们的添加剂b在200°Cx60min后进行第二次退火后,电阻率降低了34%,退火后PCB铜的电阻率仅为传统电沉积铜的1.32。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
No pumping at 450°C with electrodeposited copper TSV Comprehensive comparison of 3D-TSV integrated solid-state drives (SSDs) with storage class memory and NAND flash memory Vacuum-assisted-spin-coating of polyimide liner for high-aspect-ratio TSVs applications Reconfigured multichip-on-wafer (mCoW) Cu/oxide hybrid bonding technology for ultra-high density 3D integration using recessed oxide, thin glue adhesive, and thin metal capping layers Neuromorphic semiconductor memory
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1