{"title":"Implementation of cellular neural networks with cloning templates of smaller dimensions","authors":"R. Akbari-Dilmaghani, John T. Taylor","doi":"10.1109/ICECS.1996.582859","DOIUrl":null,"url":null,"abstract":"A new approach to the implementation of cellular neural networks (CNNs) with cloning templates of smaller dimensions is presented. The method is based on the assumptions that the circuit transients are short and possibly monotonic, and that the values of the initial state variables are taken into consideration in the design. Using the proposed method we can reduce the size of A template with any dimension (r/spl ges/1) into a single element a (ij, ij) which results in a significant reduction in the circuit complexity of a VLSI implementation of CNNs. Simulation results are presented to confirm the viability of the proposed method.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"83 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.582859","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A new approach to the implementation of cellular neural networks (CNNs) with cloning templates of smaller dimensions is presented. The method is based on the assumptions that the circuit transients are short and possibly monotonic, and that the values of the initial state variables are taken into consideration in the design. Using the proposed method we can reduce the size of A template with any dimension (r/spl ges/1) into a single element a (ij, ij) which results in a significant reduction in the circuit complexity of a VLSI implementation of CNNs. Simulation results are presented to confirm the viability of the proposed method.