Extendibility of PVD barrier/seed for BEOL Cu metallization

C. Yang, D. Edelstein, L. Clevenger, A. Cowley, J. Gill, K. Chanda, A. Simon, T. Dalton, B. Agarwala, E. Cooney, D. Nguyen, T. Spooner, A. Stamper
{"title":"Extendibility of PVD barrier/seed for BEOL Cu metallization","authors":"C. Yang, D. Edelstein, L. Clevenger, A. Cowley, J. Gill, K. Chanda, A. Simon, T. Dalton, B. Agarwala, E. Cooney, D. Nguyen, T. Spooner, A. Stamper","doi":"10.1109/IITC.2005.1499954","DOIUrl":null,"url":null,"abstract":"The paper describes a new physical vapor deposition (PVD) metallization scheme that shows a better extendibility for future technology nodes as compared to the conventional scheme. In addition to reducing the thicknesses of both the diffusion barrier and the copper seed layer (Yang, C.-C. et al., MRS Adv. Metallization Conf., p.213, 2004), this new scheme also features a sacrificial process (also called barrier-first process) (Alers, G., IEEE Int. Interconnect Technology Conf., 2003), a via-punch through process (Edelstein, D. et al., IEEE Int. Reliability Physics Symp., p.316, 2004; Kuma, N. et al., MRS Adv. Metallization Conf, p.247, 2004) and a simultaneous preclean with a metal neutral deposition process (Yang et al., US Patent 6,784,105, 2004; Uzoh, C. et al., US Patents 5,930,669, 1999; 5,933,753, 1999; 6,429,519, 2002). Significant metal line and via contact resistance decrease was observed with equal or better reliability. The impact of a sputter etch integration scheme on electrical yield and reliability is also reported. The new sputter scheme decreases contact resistance at the via/interconnect interface and can offset the one resulting from dimension scaling and thus extends PVD metallization usefulness for future technologies.","PeriodicalId":156268,"journal":{"name":"Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005.","volume":"70 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2005.1499954","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

The paper describes a new physical vapor deposition (PVD) metallization scheme that shows a better extendibility for future technology nodes as compared to the conventional scheme. In addition to reducing the thicknesses of both the diffusion barrier and the copper seed layer (Yang, C.-C. et al., MRS Adv. Metallization Conf., p.213, 2004), this new scheme also features a sacrificial process (also called barrier-first process) (Alers, G., IEEE Int. Interconnect Technology Conf., 2003), a via-punch through process (Edelstein, D. et al., IEEE Int. Reliability Physics Symp., p.316, 2004; Kuma, N. et al., MRS Adv. Metallization Conf, p.247, 2004) and a simultaneous preclean with a metal neutral deposition process (Yang et al., US Patent 6,784,105, 2004; Uzoh, C. et al., US Patents 5,930,669, 1999; 5,933,753, 1999; 6,429,519, 2002). Significant metal line and via contact resistance decrease was observed with equal or better reliability. The impact of a sputter etch integration scheme on electrical yield and reliability is also reported. The new sputter scheme decreases contact resistance at the via/interconnect interface and can offset the one resulting from dimension scaling and thus extends PVD metallization usefulness for future technologies.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
用于BEOL铜金属化的PVD屏障/种子的可扩展性
本文介绍了一种新的物理气相沉积(PVD)金属化方案,与传统方案相比,该方案对未来的技术节点具有更好的可扩展性。除了减少扩散屏障和铜种子层的厚度外(Yang, c . c . c .)。等人,MRS Adv. Metallization Conf., p.213, 2004),这个新方案还具有一个牺牲过程(也称为障碍优先过程)(Alers, G., IEEE Int.)。互连技术会议,2003年),通过穿孔过程(Edelstein, D. et al., IEEE Int。可靠性物理研讨会。,第316页,2004;Kuma, N. etal ., MRS Adv. metalalization Conf, p.247, 2004)和同时预清洁与金属中性沉积工艺(Yang etal ., US Patent 6,784,105, 2004;等,美国专利5,930,669,1999;5933753年,1999年;6429519年,2002年)。观察到显著的金属线和通孔接触电阻降低,具有相同或更好的可靠性。此外,还报道了溅射蚀刻集成方案对发电效率和可靠性的影响。新的溅射方案降低了通孔/互连界面的接触电阻,可以抵消尺寸缩放造成的接触电阻,从而扩展了PVD金属化技术在未来技术中的用途。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules Characterization of flip chip microjoins up to 40 GHz using silicon carrier Reliability and conduction mechanism study on organic ultra low-k (k=2.2) for 65/45 nm hybrid Cu damascene technology Air gap integration for the 45nm node and beyond Membrane-mediated electropolishing of damascene copper
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1