40–45 GHz high-IF stage for extremely wide tuning range receivers in 0.13 μm SiGe BiCMOS

Abstract

This paper presents a 40–45 GHz high intermediate frequency (IF) stage for an extremely wide tuning range (10–40 GHz) receiver, in a 250 GHz fT SiGe BiCMOS process. The chip of the high IF stage down-converts the input 40–45 GHz signal to a low second IF of 0.2 to 4 GHz using a frequency multiplied tunable 10.875–11.875 GHz LO signal. The chip consists of a single-ended input/differential output amplifier, a fully balanced down-converting mixer driven by an on-chip LO quadrupler with single-ended input, and a fully differential variable gain amplifier. On-wafer characterization of the chip was performed. The IF stage achieves a differential conversion gain varying from 0 to 25.5 dB and an input-referred 1 dB compression point ranging from −9 to −17.5 dBm while varying the control voltage from 1.25 to 2.8 V. The chip with a highly symmetric layout occupies an area of 1.26 mm2. It consumes 670 mW.